mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 07:17:45 -04:00
drc: various fixes / refactoring
This commit is contained in:
notaz
parent
e85944ccd9
commit
fa841b44c4
1 changed files with 129 additions and 66 deletions
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@ -119,7 +119,8 @@ enum op_types {
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OP_BRANCH_RF, // indirect far (PC + Rm)
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OP_SETCLRT, // T flag set/clear
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OP_MOVE, // register move
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OP_LOAD_POOL, // literal pool load
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OP_LOAD_POOL, // literal pool load, imm is address
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OP_MOVA,
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OP_SLEEP,
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OP_RTE,
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};
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@ -630,11 +631,11 @@ static void dr_link_blocks(struct block_entry *be, int tcache_id)
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}
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#define ADD_TO_ARRAY(array, count, item, failcode) \
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array[count++] = item; \
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if (count >= ARRAY_SIZE(array)) { \
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dbg(1, "warning: " #array " overflow"); \
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failcode; \
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}
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} \
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array[count++] = item;
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static int find_in_array(u32 *array, size_t size, u32 what)
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{
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@ -1100,7 +1101,8 @@ static int emit_memhandler_read_(int size, int ram_check)
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arg1 = rcache_get_tmp_arg(1);
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emith_move_r_r(arg1, CONTEXT_REG);
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#ifndef PDB_NET
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#if 0 // can't do this because of unmapped reads
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// ndef PDB_NET
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if (ram_check && Pico.rom == (void *)0x02000000 && Pico32xMem->sdram == (void *)0x06000000) {
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int tmp = rcache_get_tmp();
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emith_and_r_r_imm(tmp, arg0, 0xfb000000);
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@ -1519,9 +1521,35 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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sr = rcache_get_reg(SHR_SR, RC_GR_RMW);
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DELAY_SAVE_T(sr);
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}
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if (delay_dep_fw & ~BITMASK1(SHR_T))
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dbg(1, "unhandled delay_dep_fw: %x", delay_dep_fw & ~BITMASK1(SHR_T));
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if (delay_dep_bk)
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if (delay_dep_bk & BITMASK1(SHR_PC)) {
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if (opd->op != OP_LOAD_POOL && opd->op != OP_MOVA) {
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// can only be those 2 really..
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elprintf(EL_ANOMALY, "%csh2 drc: illegal slot insn %04x @ %08x?",
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sh2->is_slave ? 's' : 'm', op, pc - 2);
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}
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if (opd->imm != 0)
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; // addr already resolved somehow
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else {
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switch (ops[i-1].op) {
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case OP_BRANCH:
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emit_move_r_imm32(SHR_PC, ops[i-1].imm);
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break;
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case OP_BRANCH_CT:
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case OP_BRANCH_CF:
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tmp = rcache_get_reg(SHR_PC, RC_GR_WRITE);
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sr = rcache_get_reg(SHR_SR, RC_GR_READ);
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emith_move_r_imm(tmp, pc);
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emith_tst_r_imm(sr, T);
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tmp2 = ops[i-1].op == OP_BRANCH_CT ? DCOND_NE : DCOND_EQ;
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emith_move_r_imm_c(tmp2, tmp, ops[i-1].imm);
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break;
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// case OP_BRANCH_R OP_BRANCH_RF - PC already loaded
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}
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}
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}
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//if (delay_dep_fw & ~BITMASK1(SHR_T))
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// dbg(1, "unhandled delay_dep_fw: %x", delay_dep_fw & ~BITMASK1(SHR_T));
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if (delay_dep_bk & ~BITMASK2(SHR_PC, SHR_PR))
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dbg(1, "unhandled delay_dep_bk: %x", delay_dep_bk);
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}
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@ -1575,7 +1603,56 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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emith_add_r_imm(tmp, 4*2);
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drcf.test_irq = 1;
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drcf.pending_branch_indirect = 1;
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break;
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goto end_op;
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case OP_LOAD_POOL:
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#if PROPAGATE_CONSTANTS
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if (opd->imm != 0 && opd->imm < end_pc + MAX_LITERAL_OFFSET
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&& literal_addr_count < MAX_LITERALS)
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{
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ADD_TO_ARRAY(literal_addr, literal_addr_count, opd->imm,);
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if (opd->size == 2)
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tmp = FETCH32(opd->imm);
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else
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tmp = (u32)(int)(signed short)FETCH_OP(opd->imm);
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gconst_new(GET_Rn(), tmp);
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}
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else
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#endif
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{
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tmp = rcache_get_tmp_arg(0);
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if (opd->imm != 0)
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emith_move_r_imm(tmp, opd->imm);
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else {
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// have to calculate read addr from PC
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tmp2 = rcache_get_reg(SHR_PC, RC_GR_READ);
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if (opd->size == 2) {
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emith_add_r_r_imm(tmp, tmp2, 2 + (op & 0xff) * 4);
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emith_bic_r_imm(tmp, 3);
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}
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else
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emith_add_r_r_imm(tmp, tmp2, 2 + (op & 0xff) * 2);
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}
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tmp2 = emit_memhandler_read(opd->size);
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tmp3 = rcache_get_reg(GET_Rn(), RC_GR_WRITE);
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if (opd->size == 2)
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emith_move_r_r(tmp3, tmp2);
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else
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emith_sext(tmp3, tmp2, 16);
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rcache_free_tmp(tmp2);
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}
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goto end_op;
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case OP_MOVA:
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if (opd->imm != 0)
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emit_move_r_imm32(SHR_R0, opd->imm);
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else {
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tmp = rcache_get_reg(SHR_R0, RC_GR_WRITE);
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tmp2 = rcache_get_reg(SHR_PC, RC_GR_READ);
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emith_add_r_r_imm(tmp, tmp2, 2 + (op & 0xff) * 4);
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emith_bic_r_imm(tmp, 3);
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}
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goto end_op;
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}
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switch ((op >> 12) & 0x0f)
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@ -1749,11 +1826,11 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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case 0x04: // MOV.B Rm,@–Rn 0010nnnnmmmm0100
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case 0x05: // MOV.W Rm,@–Rn 0010nnnnmmmm0101
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case 0x06: // MOV.L Rm,@–Rn 0010nnnnmmmm0110
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rcache_get_reg_arg(1, GET_Rm()); // for Rm == Rn
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tmp = rcache_get_reg(GET_Rn(), RC_GR_RMW);
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emith_sub_r_imm(tmp, (1 << (op & 3)));
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rcache_clean();
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rcache_get_reg_arg(0, GET_Rn());
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rcache_get_reg_arg(1, GET_Rm());
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emit_memhandler_write(op & 3, pc);
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goto end_op;
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case 0x07: // DIV0S Rm,Rn 0010nnnnmmmm0111
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@ -1805,13 +1882,13 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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sr = rcache_get_reg(SHR_SR, RC_GR_RMW);
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emith_bic_r_imm(sr, T);
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emith_tst_r_imm(tmp, 0x000000ff);
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emit_or_t_if_eq(tmp);
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emit_or_t_if_eq(sr);
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emith_tst_r_imm(tmp, 0x0000ff00);
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emit_or_t_if_eq(tmp);
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emit_or_t_if_eq(sr);
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emith_tst_r_imm(tmp, 0x00ff0000);
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emit_or_t_if_eq(tmp);
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emit_or_t_if_eq(sr);
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emith_tst_r_imm(tmp, 0xff000000);
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emit_or_t_if_eq(tmp);
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emit_or_t_if_eq(sr);
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rcache_free_tmp(tmp);
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goto end_op;
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case 0x0d: // XTRCT Rm,Rn 0010nnnnmmmm1101
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@ -1985,7 +2062,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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goto end_op;
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case 1: // DT Rn 0100nnnn00010000
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sr = rcache_get_reg(SHR_SR, RC_GR_RMW);
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#ifndef DRC_CMP
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#if 0 // scheduling needs tuning
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if (FETCH_OP(pc) == 0x8bfd) { // BF #-2
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if (gconst_get(GET_Rn(), &tmp)) {
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// XXX: limit burned cycles
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@ -2384,27 +2461,6 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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}
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goto default_;
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/////////////////////////////////////////////
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case 0x09:
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// MOV.W @(disp,PC),Rn 1001nnnndddddddd
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tmp = pc + (op & 0xff) * 2 + 2;
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#if PROPAGATE_CONSTANTS
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if (tmp < end_pc + MAX_LITERAL_OFFSET && literal_addr_count < MAX_LITERALS) {
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ADD_TO_ARRAY(literal_addr, literal_addr_count, tmp,);
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gconst_new(GET_Rn(), (u32)(int)(signed short)FETCH_OP(tmp));
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}
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else
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#endif
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{
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tmp2 = rcache_get_tmp_arg(0);
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emith_move_r_imm(tmp2, tmp);
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tmp2 = emit_memhandler_read(1);
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tmp3 = rcache_get_reg(GET_Rn(), RC_GR_WRITE);
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emith_sext(tmp3, tmp2, 16);
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rcache_free_tmp(tmp2);
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}
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goto end_op;
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/////////////////////////////////////////////
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case 0x0c:
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switch (op & 0x0f00)
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@ -2445,9 +2501,6 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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rcache_flush();
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emith_jump(sh2_drc_dispatcher);
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goto end_op;
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case 0x0700: // MOVA @(disp,PC),R0 11000111dddddddd
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emit_move_r_imm32(SHR_R0, (pc + (op & 0xff) * 4 + 2) & ~3);
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goto end_op;
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case 0x0800: // TST #imm,R0 11001000iiiiiiii
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tmp = rcache_get_reg(SHR_R0, RC_GR_READ);
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sr = rcache_get_reg(SHR_SR, RC_GR_RMW);
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@ -2498,27 +2551,6 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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}
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goto default_;
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/////////////////////////////////////////////
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case 0x0d:
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// MOV.L @(disp,PC),Rn 1101nnnndddddddd
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tmp = (pc + (op & 0xff) * 4 + 2) & ~3;
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#if PROPAGATE_CONSTANTS
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if (tmp < end_pc + MAX_LITERAL_OFFSET && literal_addr_count < MAX_LITERALS) {
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ADD_TO_ARRAY(literal_addr, literal_addr_count, tmp,);
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gconst_new(GET_Rn(), FETCH32(tmp));
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}
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else
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#endif
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{
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tmp2 = rcache_get_tmp_arg(0);
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emith_move_r_imm(tmp2, tmp);
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tmp2 = emit_memhandler_read(2);
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tmp3 = rcache_get_reg(GET_Rn(), RC_GR_WRITE);
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emith_move_r_r(tmp3, tmp2);
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rcache_free_tmp(tmp2);
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}
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goto end_op;
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/////////////////////////////////////////////
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case 0x0e:
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// MOV #imm,Rn 1110nnnniiiiiiii
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@ -2546,6 +2578,8 @@ end_op:
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if (drcf.test_irq && !drcf.pending_branch_direct) {
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sr = rcache_get_reg(SHR_SR, RC_GR_RMW);
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FLUSH_CYCLES(sr);
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if (!drcf.pending_branch_indirect)
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emit_move_r_imm32(SHR_PC, pc);
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rcache_flush();
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emith_call(sh2_drc_test_irq);
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drcf.test_irq = 0;
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@ -2667,7 +2701,8 @@ end_op:
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// mark memory blocks as containing compiled code
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// override any overlay blocks as they become unreachable anyway
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if (tcache_id != 0 || (block->addr & 0xc7fc0000) == 0x06000000)
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if ((block->addr & 0xc7fc0000) == 0x06000000
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|| (block->addr & 0xfffff000) == 0xc0000000)
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{
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u16 *drc_ram_blk = NULL;
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u32 addr, mask = 0, shift = 0;
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@ -2678,7 +2713,7 @@ end_op:
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shift = SH2_DRCBLK_DA_SHIFT;
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mask = 0xfff;
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}
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else if ((block->addr & 0xc7fc0000) == 0x06000000) {
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else {
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// SDRAM
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drc_ram_blk = Pico32xMem->drcblk_ram;
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shift = SH2_DRCBLK_RAM_SHIFT;
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@ -2926,7 +2961,7 @@ static void sh2_smc_rm_block_entry(struct block_desc *bd, int tcache_id, u32 ram
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// since we never reuse tcache space of dead blocks,
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// insert jump to dispatcher for blocks that are linked to this
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tcache_ptr = bd->entryp[i].tcache_ptr;
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emit_move_r_imm32(SHR_PC, bd->addr);
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emit_move_r_imm32(SHR_PC, bd->entryp[i].pc);
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rcache_flush();
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emith_jump(sh2_drc_dispatcher);
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@ -3729,13 +3764,16 @@ void scan_block(u32 base_pc, int is_slave, u8 *op_flags, u32 *end_pc_out,
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opd->source = BITMASK1(GET_Rm());
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opd->dest |= BITMASK1(GET_Rn());
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break;
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case 0x0a: // NEGC Rm,Rn 0110nnnnmmmm1010
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opd->source = BITMASK2(GET_Rm(), SHR_T);
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opd->dest = BITMASK2(GET_Rn(), SHR_T);
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break;
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case 0x03: // MOV Rm,Rn 0110nnnnmmmm0011
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opd->op = OP_MOVE;
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goto arith_rmrn;
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case 0x07: // NOT Rm,Rn 0110nnnnmmmm0111
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case 0x08: // SWAP.B Rm,Rn 0110nnnnmmmm1000
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case 0x09: // SWAP.W Rm,Rn 0110nnnnmmmm1001
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case 0x0a: // NEGC Rm,Rn 0110nnnnmmmm1010
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case 0x0b: // NEG Rm,Rn 0110nnnnmmmm1011
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case 0x0c: // EXTU.B Rm,Rn 0110nnnnmmmm1100
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case 0x0d: // EXTU.W Rm,Rn 0110nnnnmmmm1101
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@ -3805,9 +3843,17 @@ void scan_block(u32 base_pc, int is_slave, u8 *op_flags, u32 *end_pc_out,
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case 0x09:
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// MOV.W @(disp,PC),Rn 1001nnnndddddddd
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opd->op = OP_LOAD_POOL;
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tmp = pc + 2;
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if (op_flags[i] & OF_DELAY_OP) {
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if (ops[i-1].op == OP_BRANCH)
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tmp = ops[i-1].imm;
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else
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tmp = 0;
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}
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opd->source = BITMASK1(SHR_PC);
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opd->dest = BITMASK1(GET_Rn());
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opd->imm = pc + 4 + (op & 0xff) * 2;
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if (tmp)
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opd->imm = tmp + 2 + (op & 0xff) * 2;
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opd->size = 1;
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break;
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@ -3855,8 +3901,17 @@ void scan_block(u32 base_pc, int is_slave, u8 *op_flags, u32 *end_pc_out,
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end_block = 1; // FIXME
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break;
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case 0x0700: // MOVA @(disp,PC),R0 11000111dddddddd
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opd->op = OP_MOVA;
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tmp = pc + 2;
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if (op_flags[i] & OF_DELAY_OP) {
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if (ops[i-1].op == OP_BRANCH)
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tmp = ops[i-1].imm;
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else
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tmp = 0;
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}
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opd->dest = BITMASK1(SHR_R0);
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opd->imm = (pc + 4 + (op & 0xff) * 4) & ~3;
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if (tmp)
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opd->imm = (tmp + 2 + (op & 0xff) * 4) & ~3;
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break;
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case 0x0800: // TST #imm,R0 11001000iiiiiiii
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opd->source = BITMASK1(SHR_R0);
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@ -3897,9 +3952,17 @@ void scan_block(u32 base_pc, int is_slave, u8 *op_flags, u32 *end_pc_out,
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case 0x0d:
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// MOV.L @(disp,PC),Rn 1101nnnndddddddd
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opd->op = OP_LOAD_POOL;
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tmp = pc + 2;
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if (op_flags[i] & OF_DELAY_OP) {
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if (ops[i-1].op == OP_BRANCH)
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tmp = ops[i-1].imm;
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else
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tmp = 0;
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}
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opd->source = BITMASK1(SHR_PC);
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opd->dest = BITMASK1(GET_Rn());
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opd->imm = (pc + 4 + (op & 0xff) * 2) & ~3;
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if (tmp)
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opd->imm = (tmp + 2 + (op & 0xff) * 4) & ~3;
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opd->size = 2;
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break;
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