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handle 32x+cd

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This commit is contained in:
notaz 2013-09-13 03:06:33 +03:00
parent 87650acd75
commit fa8fb75445
11 changed files with 191 additions and 103 deletions
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2
Makefile
View file

@ -183,5 +183,5 @@ pico/carthw/svp/compiler.o : cpu/drc/emit_$(ARCH).c
cpu/sh2/compiler.o : cpu/drc/emit_$(ARCH).c cpu/sh2/compiler.o : cpu/drc/emit_$(ARCH).c
cpu/sh2/mame/sh2pico.o : cpu/sh2/mame/sh2.c cpu/sh2/mame/sh2pico.o : cpu/sh2/mame/sh2.c
pico/pico.o pico/cd/mcd.o pico/32x/32x.o : pico/pico_cmn.c pico/pico_int.h pico/pico.o pico/cd/mcd.o pico/32x/32x.o : pico/pico_cmn.c pico/pico_int.h
pico/memory.o pico/cd/memory.o : pico/pico_int.h pico/memory.h pico/memory.o pico/cd/memory.o pico/32x/memory.o : pico/pico_int.h pico/memory.h
cpu/fame/famec.o: cpu/fame/famec.c cpu/fame/famec_opcodes.h cpu/fame/famec.o: cpu/fame/famec.c cpu/fame/famec_opcodes.h

12
pico/32x/32x.c
View file

@ -109,6 +109,10 @@ void Pico32xStartup(void)
p32x_pwm_ctl_changed(); p32x_pwm_ctl_changed();
p32x_timers_recalc(); p32x_timers_recalc();
Pico32x.sh2_regs[0] = P32XS2_ADEN;
if (Pico.m.ncart_in)
Pico32x.sh2_regs[0] |= P32XS_nCART;
if (!Pico.m.pal) if (!Pico.m.pal)
Pico32x.vdp_regs[0] |= P32XV_nPAL; Pico32x.vdp_regs[0] |= P32XV_nPAL;
@ -183,7 +187,6 @@ void PicoPower32x(void)
Pico32x.regs[0] = P32XS_REN|P32XS_nRES; // verified Pico32x.regs[0] = P32XS_REN|P32XS_nRES; // verified
Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_PEN; Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_PEN;
Pico32x.sh2_regs[0] = P32XS2_ADEN;
} }
void PicoUnload32x(void) void PicoUnload32x(void)
@ -516,7 +519,11 @@ void sync_sh2s_lockstep(unsigned int m68k_target)
} }
#define CPUS_RUN(m68k_cycles) do { \ #define CPUS_RUN(m68k_cycles) do { \
SekRunM68k(m68k_cycles); \ if (PicoAHW & PAHW_MCD) \
pcd_run_cpus(m68k_cycles); \
else \
SekRunM68k(m68k_cycles); \
\
if ((Pico32x.emu_flags & P32XF_Z80_32X_IO) && Pico.m.z80Run \ if ((Pico32x.emu_flags & P32XF_Z80_32X_IO) && Pico.m.z80Run \
&& !Pico.m.z80_reset && (PicoOpt & POPT_EN_Z80)) \ && !Pico.m.z80_reset && (PicoOpt & POPT_EN_Z80)) \
PicoSyncZ80(SekCyclesDone()); \ PicoSyncZ80(SekCyclesDone()); \
@ -525,6 +532,7 @@ void sync_sh2s_lockstep(unsigned int m68k_target)
} while (0) } while (0)
#define PICO_32X #define PICO_32X
#define PICO_CD
#include "../pico_cmn.c" #include "../pico_cmn.c"
void PicoFrame32x(void) void PicoFrame32x(void)

207
pico/32x/memory.c
View file

@ -786,8 +786,12 @@ static u32 PicoRead8_32x_on(u32 a)
goto out_16to8; goto out_16to8;
} }
if ((a & 0xfc00) != 0x5000) if ((a & 0xfc00) != 0x5000) {
return PicoRead8_io(a); if (PicoAHW & PAHW_MCD)
return PicoRead8_mcd_io(a);
else
return PicoRead8_io(a);
}
if ((a & 0xfff0) == 0x5180) { // a15180 if ((a & 0xfff0) == 0x5180) { // a15180
d = p32x_vdp_read16(a); d = p32x_vdp_read16(a);
@ -826,8 +830,12 @@ static u32 PicoRead16_32x_on(u32 a)
goto out; goto out;
} }
if ((a & 0xfc00) != 0x5000) if ((a & 0xfc00) != 0x5000) {
return PicoRead16_io(a); if (PicoAHW & PAHW_MCD)
return PicoRead16_mcd_io(a);
else
return PicoRead16_io(a);
}
if ((a & 0xfff0) == 0x5180) { // a15180 if ((a & 0xfff0) == 0x5180) { // a15180
d = p32x_vdp_read16(a); d = p32x_vdp_read16(a);
@ -863,7 +871,10 @@ static void PicoWrite8_32x_on(u32 a, u32 d)
} }
if ((a & 0xfc00) != 0x5000) { if ((a & 0xfc00) != 0x5000) {
PicoWrite8_io(a, d); if (PicoAHW & PAHW_MCD)
PicoWrite8_mcd_io(a, d);
else
PicoWrite8_io(a, d);
if (a == 0xa130f1) if (a == 0xa130f1)
bank_switch(Pico32x.regs[4 / 2]); bank_switch(Pico32x.regs[4 / 2]);
return; return;
@ -898,7 +909,10 @@ static void PicoWrite16_32x_on(u32 a, u32 d)
} }
if ((a & 0xfc00) != 0x5000) { if ((a & 0xfc00) != 0x5000) {
PicoWrite16_io(a, d); if (PicoAHW & PAHW_MCD)
PicoWrite16_mcd_io(a, d);
else
PicoWrite16_io(a, d);
if (a == 0xa130f0) if (a == 0xa130f0)
bank_switch(Pico32x.regs[4 / 2]); bank_switch(Pico32x.regs[4 / 2]);
return; return;
@ -1141,6 +1155,9 @@ static void bank_switch(int b)
{ {
unsigned int rs, bank; unsigned int rs, bank;
if (Pico.m.ncart_in)
return;
bank = b << 20; bank = b << 20;
if ((Pico.m.sram_reg & SRR_MAPPED) && bank == SRam.start) { if ((Pico.m.sram_reg & SRR_MAPPED) && bank == SRam.start) {
bank_map_handler(); bank_map_handler();
@ -1536,42 +1553,94 @@ static void z80_md_bank_write_32x(unsigned int a, unsigned char d)
static const u16 msh2_code[] = { static const u16 msh2_code[] = {
// trap instructions // trap instructions
0xaffe, // bra <self> 0xaffe, // 200 bra <self>
0x0009, // nop 0x0009, // 202 nop
// have to wait a bit until m68k initial program finishes clearing stuff // have to wait a bit until m68k initial program finishes clearing stuff
// to avoid races with game SH2 code, like in Tempo // to avoid races with game SH2 code, like in Tempo
0xd004, // mov.l @(_m_ok,pc), r0 0xd406, // 204 mov.l @(_m_ok,pc), r4
0xd105, // mov.l @(_cnt,pc), r1 0xc400, // 206 mov.b @(h'0,gbr),r0
0xd205, // mov.l @(_start,pc), r2 0xc801, // 208 tst #1, r0
0x71ff, // add #-1, r1 0x8b0f, // 20a bf cd_start
0x4115, // cmp/pl r1 0xd105, // 20c mov.l @(_cnt,pc), r1
0x89fc, // bt -2 0xd206, // 20e mov.l @(_start,pc), r2
0xc208, // mov.l r0, @(h'20,gbr) 0x71ff, // 210 add #-1, r1
0x6822, // mov.l @r2, r8 0x4115, // 212 cmp/pl r1
0x482b, // jmp @r8 0x89fc, // 214 bt -2
0x0009, // nop 0x6043, // 216 mov r4, r0
('M'<<8)|'_', ('O'<<8)|'K', 0xc208, // 218 mov.l r0, @(h'20,gbr)
0x0001, 0x0000, 0x6822, // 21a mov.l @r2, r8
0x2200, 0x03e0 // master start pointer in ROM 0x482b, // 21c jmp @r8
0x0009, // 21e nop
('M'<<8)|'_', ('O'<<8)|'K', // 220 _m_ok
0x0001, 0x0000, // 224 _cnt
0x2200, 0x03e0, // master start pointer in ROM
// cd_start:
0xd20d, // 22c mov.l @(__cd_,pc), r2
0xc608, // 22e mov.l @(h'20,gbr), r0
0x3200, // 230 cmp/eq r0, r2
0x8bfc, // 232 bf #-2
0xe000, // 234 mov #0, r0
0xcf80, // 236 or.b #0x80,@(r0,gbr)
0xd80b, // 238 mov.l @(_start_cd,pc), r8 // 24000018
0xd30c, // 23a mov.l @(_max_len,pc), r3
0x5b84, // 23c mov.l @(h'10,r8), r11 // master vbr
0x5a82, // 23e mov.l @(8,r8), r10 // entry
0x5081, // 240 mov.l @(4,r8), r0 // len
0x5980, // 242 mov.l @(0,r8), r9 // dst
0x3036, // 244 cmp/hi r3,r0
0x8b00, // 246 bf #1
0x6033, // 248 mov r3,r0
0x7820, // 24a add #0x20, r8
// ipl_copy:
0x6286, // 24c mov.l @r8+, r2
0x2922, // 24e mov.l r2, @r9
0x7904, // 250 add #4, r9
0x70fc, // 252 add #-4, r0
0x8800, // 254 cmp/eq #0, r0
0x8bf9, // 256 bf #-5
//
0x4b2e, // 258 ldc r11, vbr
0x6043, // 25a mov r4, r0 // M_OK
0xc208, // 25c mov.l r0, @(h'20,gbr)
0x4a2b, // 25e jmp @r10
0x0009, // 260 nop
0x0009, // 262 nop // pad
('_'<<8)|'C', ('D'<<8)|'_', // 264 __cd_
0x2400, 0x0018, // 268 _start_cd
0x0001, 0xffe0, // 26c _max_len
}; };
static const u16 ssh2_code[] = { static const u16 ssh2_code[] = {
0xaffe, // bra <self> 0xaffe, // 200 bra <self>
0x0009, // nop 0x0009, // 202 nop
// code to wait for master, in case authentic master BIOS is used // code to wait for master, in case authentic master BIOS is used
0xd104, // mov.l @(_m_ok,pc), r1 0xd106, // 204 mov.l @(_m_ok,pc), r1
0xd206, // mov.l @(_start,pc), r2 0xd208, // 206 mov.l @(_start,pc), r2
0xc608, // mov.l @(h'20,gbr), r0 0xc608, // 208 mov.l @(h'20,gbr), r0
0x3100, // cmp/eq r0, r1 0x3100, // 20a cmp/eq r0, r1
0x8bfc, // bf #-2 0x8bfc, // 20c bf #-2
0xd003, // mov.l @(_s_ok,pc), r0 0xc400, // 20e mov.b @(h'0,gbr),r0
0xc209, // mov.l r0, @(h'24,gbr) 0xc801, // 210 tst #1, r0
0x6822, // mov.l @r2, r8 0xd004, // 212 mov.l @(_s_ok,pc), r0
0x482b, // jmp @r8 0x8b0a, // 214 bf cd_start
0x0009, // nop 0xc209, // 216 mov.l r0, @(h'24,gbr)
('M'<<8)|'_', ('O'<<8)|'K', 0x6822, // 218 mov.l @r2, r8
('S'<<8)|'_', ('O'<<8)|'K', 0x482b, // 21a jmp @r8
0x2200, 0x03e4 // slave start pointer in ROM 0x0009, // 21c nop
0x0009, // 21e nop
('M'<<8)|'_', ('O'<<8)|'K', // 220
('S'<<8)|'_', ('O'<<8)|'K', // 224
0x2200, 0x03e4, // slave start pointer in ROM
// cd_start:
0xd803, // 22c mov.l @(_start_cd,pc), r8 // 24000018
0x5b85, // 22e mov.l @(h'14,r8), r11 // slave vbr
0x5a83, // 230 mov.l @(h'0c,r8), r10 // entry
0x4b2e, // 232 ldc r11, vbr
0xc209, // 234 mov.l r0, @(h'24,gbr) // write S_OK
0x4a2b, // 236 jmp @r10
0x0009, // 238 nop
0x0009, // 23a nop
0x2400, 0x0018, // 23c _start_cd
}; };
#define HWSWAP(x) (((u16)(x) << 16) | ((x) >> 16)) #define HWSWAP(x) (((u16)(x) << 16) | ((x) >> 16))
@ -1622,13 +1691,13 @@ static void get_bios(void)
for (i = 0; i < 128; i++) for (i = 0; i < 128; i++)
pl[i] = HWSWAP(0x200); pl[i] = HWSWAP(0x200);
// startup code
memcpy(&Pico32xMem->sh2_rom_m.b[0x200], msh2_code, sizeof(msh2_code));
// reset SP
pl[1] = pl[3] = HWSWAP(0x6040000);
// start // start
pl[0] = pl[2] = HWSWAP(0x204); pl[0] = pl[2] = HWSWAP(0x204);
// reset SP
pl[1] = pl[3] = HWSWAP(0x6040000);
// startup code
memcpy(&Pico32xMem->sh2_rom_m.b[0x200], msh2_code, sizeof(msh2_code));
} }
// SSH2 // SSH2
@ -1643,13 +1712,13 @@ static void get_bios(void)
for (i = 0; i < 128; i++) for (i = 0; i < 128; i++)
pl[i] = HWSWAP(0x200); pl[i] = HWSWAP(0x200);
// startup code
memcpy(&Pico32xMem->sh2_rom_s.b[0x200], ssh2_code, sizeof(ssh2_code));
// reset SP
pl[1] = pl[3] = HWSWAP(0x603f800);
// start // start
pl[0] = pl[2] = HWSWAP(0x204); pl[0] = pl[2] = HWSWAP(0x204);
// reset SP
pl[1] = pl[3] = HWSWAP(0x603f800);
// startup code
memcpy(&Pico32xMem->sh2_rom_s.b[0x200], ssh2_code, sizeof(ssh2_code));
} }
} }
@ -1697,32 +1766,34 @@ void PicoMemSetup32x(void)
// so that we can avoid handling the RV bit. // so that we can avoid handling the RV bit.
// m68k_map_unmap(0x000000, 0x3fffff); // m68k_map_unmap(0x000000, 0x3fffff);
// MD ROM area if (!Pico.m.ncart_in) {
rs = sizeof(Pico32xMem->m68k_rom_bank); // MD ROM area
cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico32xMem->m68k_rom_bank, 0); rs = sizeof(Pico32xMem->m68k_rom_bank);
cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico32xMem->m68k_rom_bank, 0); cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico32xMem->m68k_rom_bank, 0);
cpu68k_map_set(m68k_write8_map, 0x000000, rs - 1, PicoWrite8_hint, 1); // TODO verify cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico32xMem->m68k_rom_bank, 0);
cpu68k_map_set(m68k_write16_map, 0x000000, rs - 1, PicoWrite16_hint, 1); cpu68k_map_set(m68k_write8_map, 0x000000, rs - 1, PicoWrite8_hint, 1); // TODO verify
cpu68k_map_set(m68k_write16_map, 0x000000, rs - 1, PicoWrite16_hint, 1);
// 32X ROM (unbanked, XXX: consider mirroring?) // 32X ROM (unbanked, XXX: consider mirroring?)
rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK; rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
if (rs > 0x80000) if (rs > 0x80000)
rs = 0x80000; rs = 0x80000;
cpu68k_map_set(m68k_read8_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0); cpu68k_map_set(m68k_read8_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0); cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
cpu68k_map_set(m68k_write8_map, 0x880000, 0x880000 + rs - 1, PicoWrite8_cart, 1); cpu68k_map_set(m68k_write8_map, 0x880000, 0x880000 + rs - 1, PicoWrite8_cart, 1);
cpu68k_map_set(m68k_write16_map, 0x880000, 0x880000 + rs - 1, PicoWrite16_cart, 1); cpu68k_map_set(m68k_write16_map, 0x880000, 0x880000 + rs - 1, PicoWrite16_cart, 1);
#ifdef EMU_F68K #ifdef EMU_F68K
// setup FAME fetchmap // setup FAME fetchmap
PicoCpuFM68k.Fetch[0] = (unsigned long)Pico32xMem->m68k_rom; PicoCpuFM68k.Fetch[0] = (unsigned long)Pico32xMem->m68k_rom;
for (rs = 0x88; rs < 0x90; rs++) for (rs = 0x88; rs < 0x90; rs++)
PicoCpuFM68k.Fetch[rs] = (unsigned long)Pico.rom - 0x880000; PicoCpuFM68k.Fetch[rs] = (unsigned long)Pico.rom - 0x880000;
#endif #endif
// 32X ROM (banked) // 32X ROM (banked)
bank_switch(0); bank_switch(0);
cpu68k_map_set(m68k_write8_map, 0x900000, 0x9fffff, PicoWrite8_bank, 1); cpu68k_map_set(m68k_write8_map, 0x900000, 0x9fffff, PicoWrite8_bank, 1);
cpu68k_map_set(m68k_write16_map, 0x900000, 0x9fffff, PicoWrite16_bank, 1); cpu68k_map_set(m68k_write16_map, 0x900000, 0x9fffff, PicoWrite16_bank, 1);
}
// SYS regs // SYS regs
cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_32x_on, 1); cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_32x_on, 1);

4
pico/cd/mcd.c
View file

@ -250,7 +250,7 @@ int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
static void SekSyncM68k(void); static void SekSyncM68k(void);
static inline void pcd_run_cpus_normal(int m68k_cycles) void pcd_run_cpus_normal(int m68k_cycles)
{ {
SekCycleAim += m68k_cycles; SekCycleAim += m68k_cycles;
if (SekShouldInterrupt() || Pico_mcd->m.m68k_poll_cnt < 12) if (SekShouldInterrupt() || Pico_mcd->m.m68k_poll_cnt < 12)
@ -269,7 +269,7 @@ static inline void pcd_run_cpus_normal(int m68k_cycles)
SekSyncM68k(); SekSyncM68k();
} }
static inline void pcd_run_cpus_lockstep(int m68k_cycles) void pcd_run_cpus_lockstep(int m68k_cycles)
{ {
unsigned int target = SekCycleAim + m68k_cycles; unsigned int target = SekCycleAim + m68k_cycles;
do { do {

21
pico/cd/memory.c
View file

@ -28,11 +28,6 @@ MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)
// provided by ASM code: // provided by ASM code:
#ifdef _ASM_CD_MEMORY_C #ifdef _ASM_CD_MEMORY_C
u32 PicoReadM68k8_io(u32 a);
u32 PicoReadM68k16_io(u32 a);
void PicoWriteM68k8_io(u32 a, u32 d);
void PicoWriteM68k16_io(u32 a, u32 d);
u32 PicoReadS68k8_pr(u32 a); u32 PicoReadS68k8_pr(u32 a);
u32 PicoReadS68k16_pr(u32 a); u32 PicoReadS68k16_pr(u32 a);
void PicoWriteS68k8_pr(u32 a, u32 d); void PicoWriteS68k8_pr(u32 a, u32 d);
@ -566,7 +561,7 @@ static void PicoWriteM68k16_ramc(u32 a, u32 d)
// IO/control/cd registers (a10000 - ...) // IO/control/cd registers (a10000 - ...)
#ifndef _ASM_CD_MEMORY_C #ifndef _ASM_CD_MEMORY_C
static u32 PicoReadM68k8_io(u32 a) u32 PicoRead8_mcd_io(u32 a)
{ {
u32 d; u32 d;
if ((a & 0xff00) == 0x2000) { // a12000 - a120ff if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
@ -583,7 +578,7 @@ static u32 PicoReadM68k8_io(u32 a)
return PicoRead8_io(a); return PicoRead8_io(a);
} }
static u32 PicoReadM68k16_io(u32 a) u32 PicoRead16_mcd_io(u32 a)
{ {
u32 d; u32 d;
if ((a & 0xff00) == 0x2000) { if ((a & 0xff00) == 0x2000) {
@ -596,7 +591,7 @@ static u32 PicoReadM68k16_io(u32 a)
return PicoRead16_io(a); return PicoRead16_io(a);
} }
static void PicoWriteM68k8_io(u32 a, u32 d) void PicoWrite8_mcd_io(u32 a, u32 d)
{ {
if ((a & 0xff00) == 0x2000) { // a12000 - a120ff if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x", elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x",
@ -608,7 +603,7 @@ static void PicoWriteM68k8_io(u32 a, u32 d)
PicoWrite16_io(a, d); PicoWrite16_io(a, d);
} }
static void PicoWriteM68k16_io(u32 a, u32 d) void PicoWrite16_mcd_io(u32 a, u32 d)
{ {
if ((a & 0xff00) == 0x2000) { // a12000 - a120ff if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x",
@ -1057,10 +1052,10 @@ PICO_INTERNAL void PicoMemSetupCD(void)
} }
// registers/IO: // registers/IO:
cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoReadM68k8_io, 1); cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_mcd_io, 1);
cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoReadM68k16_io, 1); cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_mcd_io, 1);
cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWriteM68k8_io, 1); cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_mcd_io, 1);
cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWriteM68k16_io, 1); cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_mcd_io, 1);
// sub68k map // sub68k map
cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1); cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);

16
pico/cd/memory_arm.s
View file

@ -11,10 +11,10 @@
.text .text
.align 2 .align 2
.global PicoReadM68k8_io .global PicoRead8_mcd_io
.global PicoReadM68k16_io .global PicoRead16_mcd_io
.global PicoWriteM68k8_io .global PicoWrite8_mcd_io
.global PicoWriteM68k16_io .global PicoWrite16_mcd_io
.global PicoReadS68k8_pr .global PicoReadS68k8_pr
.global PicoReadS68k16_pr .global PicoReadS68k16_pr
@ -134,7 +134,7 @@ PicoReadM68k8_cell1: @ 0x220000 - 0x23ffff, cell arranged
bx lr bx lr
PicoReadM68k8_io: PicoRead8_mcd_io:
and r1, r0, #0xff00 and r1, r0, #0xff00
cmp r1, #0x2000 @ a120xx? cmp r1, #0x2000 @ a120xx?
bne PicoRead8_io bne PicoRead8_io
@ -244,7 +244,7 @@ PicoReadM68k16_cell1: @ 0x220000 - 0x23ffff, cell arranged
bx lr bx lr
PicoReadM68k16_io: PicoRead16_mcd_io:
and r1, r0, #0xff00 and r1, r0, #0xff00
cmp r1, #0x2000 @ a120xx cmp r1, #0x2000 @ a120xx
bne PicoRead16_io bne PicoRead16_io
@ -335,7 +335,7 @@ PicoWriteM68k8_cell1: @ 0x220000 - 0x23ffff, cell arranged
bx lr bx lr
PicoWriteM68k8_io: PicoWrite8_mcd_io:
and r2, r0, #0xff00 and r2, r0, #0xff00
cmp r2, #0x2000 @ a120xx? cmp r2, #0x2000 @ a120xx?
beq m68k_reg_write8 beq m68k_reg_write8
@ -362,7 +362,7 @@ PicoWriteM68k16_cell1: @ 0x220000 - 0x23ffff, cell arranged
bx lr bx lr
PicoWriteM68k16_io: PicoWrite16_mcd_io:
and r2, r0, #0xff00 and r2, r0, #0xff00
cmp r2, #0x2000 @ a120xx? cmp r2, #0x2000 @ a120xx?
bne PicoWrite16_io bne PicoWrite16_io

2
pico/media.c
View file

@ -287,6 +287,7 @@ enum media_type_e PicoLoadMedia(const char *filename,
goto out; goto out;
} }
rom_data = NULL; // now belongs to PicoCart rom_data = NULL; // now belongs to PicoCart
Pico.m.ncart_in = 0;
// insert CD if it was detected // insert CD if it was detected
if (cd_img_type != CIT_NOT_CD) { if (cd_img_type != CIT_NOT_CD) {
@ -296,6 +297,7 @@ enum media_type_e PicoLoadMedia(const char *filename,
media_type = PM_BAD_CD; media_type = PM_BAD_CD;
goto out; goto out;
} }
Pico.m.ncart_in = 1;
} }
if (PicoQuirks & PQUIRK_FORCE_6BTN) if (PicoQuirks & PQUIRK_FORCE_6BTN)

9
pico/pico.c
View file

@ -313,14 +313,13 @@ void PicoFrame(void)
goto end; goto end;
} }
// TODO: MCD+32X if (PicoAHW & PAHW_32X) {
if (PicoAHW & PAHW_MCD) { PicoFrame32x(); // also does MCD+32X
PicoFrameMCD();
goto end; goto end;
} }
if (PicoAHW & PAHW_32X) { if (PicoAHW & PAHW_MCD) {
PicoFrame32x(); PicoFrameMCD();
goto end; goto end;
} }

9
pico/pico_cmn.c
View file

@ -148,7 +148,8 @@ static int PicoFrameHints(void)
if (ym2612.dacen && PsndDacLine <= y) if (ym2612.dacen && PsndDacLine <= y)
PsndDoDAC(y); PsndDoDAC(y);
#ifdef PICO_CD #ifdef PICO_CD
pcd_sync_s68k(cycles, 0); if (PicoAHW & PAHW_MCD)
pcd_sync_s68k(cycles, 0);
#endif #endif
#ifdef PICO_32X #ifdef PICO_32X
p32x_sync_sh2s(cycles); p32x_sync_sh2s(cycles);
@ -219,7 +220,8 @@ static int PicoFrameHints(void)
} }
#ifdef PICO_CD #ifdef PICO_CD
pcd_sync_s68k(cycles, 0); if (PicoAHW & PAHW_MCD)
pcd_sync_s68k(cycles, 0);
#endif #endif
#ifdef PICO_32X #ifdef PICO_32X
p32x_sync_sh2s(cycles); p32x_sync_sh2s(cycles);
@ -271,7 +273,8 @@ static int PicoFrameHints(void)
PsndDoDAC(lines-1); PsndDoDAC(lines-1);
#ifdef PICO_CD #ifdef PICO_CD
pcd_sync_s68k(cycles, 0); if (PicoAHW & PAHW_MCD)
pcd_sync_s68k(cycles, 0);
#endif #endif
#ifdef PICO_32X #ifdef PICO_32X
p32x_sync_sh2s(cycles); p32x_sync_sh2s(cycles);

8
pico/pico_int.h
View file

@ -307,7 +307,7 @@ struct PicoMisc
unsigned char sram_reg; // 09 SRAM reg. See SRR_* below unsigned char sram_reg; // 09 SRAM reg. See SRR_* below
unsigned short z80_bank68k; // 0a unsigned short z80_bank68k; // 0a
unsigned short pad0; unsigned short pad0;
unsigned char pad1; unsigned char ncart_in; // 0e !cart_in
unsigned char z80_reset; // 0f z80 reset held unsigned char z80_reset; // 0f z80 reset held
unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay
unsigned short eeprom_addr; // EEPROM address register unsigned short eeprom_addr; // EEPROM address register
@ -452,6 +452,7 @@ typedef struct
// 32X // 32X
#define P32XS_FM (1<<15) #define P32XS_FM (1<<15)
#define P32XS_nCART (1<< 8)
#define P32XS_REN (1<< 7) #define P32XS_REN (1<< 7)
#define P32XS_nRES (1<< 1) #define P32XS_nRES (1<< 1)
#define P32XS_ADEN (1<< 0) #define P32XS_ADEN (1<< 0)
@ -607,6 +608,10 @@ PICO_INTERNAL void PicoMemSetupPico(void);
// cd/memory.c // cd/memory.c
PICO_INTERNAL void PicoMemSetupCD(void); PICO_INTERNAL void PicoMemSetupCD(void);
unsigned int PicoRead8_mcd_io(unsigned int a);
unsigned int PicoRead16_mcd_io(unsigned int a);
void PicoWrite8_mcd_io(unsigned int a, unsigned int d);
void PicoWrite16_mcd_io(unsigned int a, unsigned int d);
void pcd_state_loaded_mem(void); void pcd_state_loaded_mem(void);
// pico.c // pico.c
@ -647,6 +652,7 @@ void pcd_event_schedule(unsigned int now, enum pcd_event event, int after);
void pcd_event_schedule_s68k(enum pcd_event event, int after); void pcd_event_schedule_s68k(enum pcd_event event, int after);
unsigned int pcd_cycles_m68k_to_s68k(unsigned int c); unsigned int pcd_cycles_m68k_to_s68k(unsigned int c);
int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync); int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync);
void pcd_run_cpus(int m68k_cycles);
void pcd_state_loaded(void); void pcd_state_loaded(void);
// pico/pico.c // pico/pico.c

4
platform/common/emu.c
View file

@ -322,6 +322,10 @@ static void system_announce(void)
#endif #endif
} else if (PicoAHW & PAHW_PICO) { } else if (PicoAHW & PAHW_PICO) {
sys_name = "Pico"; sys_name = "Pico";
} else if ((PicoAHW & (PAHW_32X|PAHW_MCD)) == (PAHW_32X|PAHW_MCD)) {
sys_name = "32X + Mega CD";
if ((Pico.m.hardware & 0xc0) == 0x80)
sys_name = "32X + Sega CD";
} else if (PicoAHW & PAHW_MCD) { } else if (PicoAHW & PAHW_MCD) {
sys_name = "Mega CD"; sys_name = "Mega CD";
if ((Pico.m.hardware & 0xc0) == 0x80) if ((Pico.m.hardware & 0xc0) == 0x80)