mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 07:17:45 -04:00
core, improve mcd+32x cpu synchronization
This commit is contained in:
kub
parent
db8af214be
commit
fdaf9d10bd
2 changed files with 47 additions and 50 deletions
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@ -215,7 +215,7 @@ void PicoReset32x(void)
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}
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}
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static void p32x_start_blank(void)
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static void p32x_render_frame(void)
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{
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if (Pico32xDrawMode != PDM32X_OFF && !PicoIn.skipFrame) {
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int offs, lines;
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@ -228,7 +228,6 @@ static void p32x_start_blank(void)
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lines = 240;
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}
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// XXX: no proper handling of 32col mode..
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if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0 && // 32x not blanking
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(!(Pico.video.debug_p & PVD_KILL_32X)))
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{
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@ -242,7 +241,10 @@ static void p32x_start_blank(void)
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pprof_end(draw);
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}
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}
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static void p32x_start_blank(void)
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{
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// enter vblank
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Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN;
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@ -258,17 +260,23 @@ static void p32x_start_blank(void)
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p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, SekCyclesDone());
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}
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static void p32x_end_blank(void)
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{
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// end vblank
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Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
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if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
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Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
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if (!(Pico32x.sh2_regs[0] & 0x80))
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p32x_schedule_hint(NULL, SekCyclesDone());
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}
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void p32x_schedule_hint(SH2 *sh2, unsigned int m68k_cycles)
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{
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// rather rough, 32x hint is useless in practice
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int after;
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if (!((Pico32x.sh2irq_mask[0] | Pico32x.sh2irq_mask[1]) & 4))
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return; // nobody cares
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// note: when Pico.m.scanline is 224, SH2s might
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// still be at scanline 93 (or so)
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if (!(Pico32x.sh2_regs[0] & 0x80) &&
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Pico.m.scanline > (Pico.video.reg[1] & 0x08 ? 240 : 224))
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if (!(Pico32x.sh2_regs[0] & 0x80) && (Pico.video.status & PVS_VB2))
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return;
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after = (Pico32x.sh2_regs[4 / 2] + 1) * 488;
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@ -572,14 +580,6 @@ void PicoFrame32x(void)
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sh2_execute_prepare(&msh2, PicoIn.opt & POPT_EN_DRC);
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sh2_execute_prepare(&ssh2, PicoIn.opt & POPT_EN_DRC);
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Pico.m.scanline = 0;
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Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
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if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
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Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
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if (!(Pico32x.sh2_regs[0] & 0x80))
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p32x_schedule_hint(NULL, SekCyclesDone());
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p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, SekCyclesDone());
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p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, SekCyclesDone());
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@ -62,6 +62,21 @@ static __inline void SekRunM68k(int cyc)
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SekSyncM68k();
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}
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static void SyncCPUs(unsigned int cycles)
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{
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// sync cpus
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if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoIn.opt&POPT_EN_Z80))
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PicoSyncZ80(cycles);
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#ifdef PICO_CD
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if (PicoIn.AHW & PAHW_MCD)
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pcd_sync_s68k(cycles, 0);
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#endif
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#ifdef PICO_32X
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p32x_sync_sh2s(cycles);
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#endif
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}
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static void do_hint(struct PicoVideo *pv)
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{
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pv->pending_ints |= 0x10;
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@ -87,21 +102,11 @@ static int PicoFrameHints(void)
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struct PicoVideo *pv = &Pico.video;
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int lines, y, lines_vis, skip;
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int vcnt_wrap, vcnt_adj;
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unsigned int cycles;
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int hint; // Hint counter
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pevt_log_m68k_o(EVT_FRAME_START);
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if ((PicoIn.opt&POPT_ALT_RENDERER) && !PicoIn.skipFrame && (pv->reg[1]&0x40)) { // fast rend., display enabled
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// draw a frame just after vblank in alternative render mode
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// yes, this will cause 1 frame lag, but this is inaccurate mode anyway.
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PicoFrameFull();
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#ifdef DRAW_FINISH_FUNC
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DRAW_FINISH_FUNC();
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#endif
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skip = 1;
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}
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else skip=PicoIn.skipFrame;
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skip = PicoIn.skipFrame;
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Pico.t.m68c_frame_start = Pico.t.m68c_aim;
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pv->v_counter = Pico.m.scanline = 0;
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@ -109,9 +114,12 @@ static int PicoFrameHints(void)
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PsndStartFrame();
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hint = pv->hint_cnt;
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// === active display ===
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pv->status |= PVS_ACTIVE;
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for (y = 0; ; y++)
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lines_vis = (pv->reg[1] & 8) ? 240 : 224;
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for (y = 0; y < lines_vis; y++)
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{
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pv->v_counter = Pico.m.scanline = y;
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if ((pv->reg[12]&6) == 6) { // interlace mode 2
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@ -120,9 +128,6 @@ static int PicoFrameHints(void)
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pv->v_counter &= 0xff;
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}
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if ((y == 224 && !(pv->reg[1] & 8)) || y == 240)
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break;
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PAD_DELAY();
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// H-Interrupts:
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@ -155,9 +160,10 @@ static int PicoFrameHints(void)
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pevt_log_m68k_o(EVT_NEXT_LINE);
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}
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lines_vis = (pv->reg[1] & 8) ? 240 : 224;
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if (y == lines_vis)
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pv->status &= ~PVS_ACTIVE;
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SyncCPUs(Pico.t.m68c_aim);
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// === VBLANK, 1st line ===
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pv->status &= ~PVS_ACTIVE;
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if (!skip)
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{
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@ -167,6 +173,9 @@ static int PicoFrameHints(void)
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DRAW_FINISH_FUNC();
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#endif
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}
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#ifdef PICO_32X
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p32x_render_frame();
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#endif
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memcpy(PicoIn.padInt, PicoIn.pad, sizeof(PicoIn.padInt));
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PAD_DELAY();
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@ -198,19 +207,13 @@ static int PicoFrameHints(void)
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SekInterrupt(6);
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}
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cycles = Pico.t.m68c_aim;
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if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoIn.opt&POPT_EN_Z80)) {
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PicoSyncZ80(cycles);
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PicoSyncZ80(Pico.t.m68c_aim);
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elprintf(EL_INTS, "zint");
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z80_int();
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}
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#ifdef PICO_CD
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if (PicoIn.AHW & PAHW_MCD)
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pcd_sync_s68k(cycles, 0);
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#endif
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#ifdef PICO_32X
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p32x_sync_sh2s(cycles);
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p32x_start_blank();
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#endif
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@ -221,6 +224,7 @@ static int PicoFrameHints(void)
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if (PicoLineHook) PicoLineHook();
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pevt_log_m68k_o(EVT_NEXT_LINE);
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// === VBLANK ===
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if (Pico.m.pal) {
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lines = 313;
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vcnt_wrap = 0x103;
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@ -269,6 +273,7 @@ static int PicoFrameHints(void)
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}
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}
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// === VBLANK last line ===
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pv->status &= ~(SR_VB | PVS_VB2);
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pv->status |= ((pv->reg[1] >> 3) ^ SR_VB) & SR_VB; // forced blanking
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@ -297,17 +302,9 @@ static int PicoFrameHints(void)
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if (PicoLineHook) PicoLineHook();
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pevt_log_m68k_o(EVT_NEXT_LINE);
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// sync cpus
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cycles = Pico.t.m68c_aim;
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if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoIn.opt&POPT_EN_Z80))
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PicoSyncZ80(cycles);
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#ifdef PICO_CD
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if (PicoIn.AHW & PAHW_MCD)
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pcd_sync_s68k(cycles, 0);
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#endif
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SyncCPUs(Pico.t.m68c_aim);
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#ifdef PICO_32X
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p32x_sync_sh2s(cycles);
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p32x_end_blank();
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#endif
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// get samples from sound chips
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