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32x, hacks for roms with caching related problems
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commit
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7 changed files with 89 additions and 28 deletions
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@ -816,7 +816,7 @@ static void p32x_sh2reg_write8(u32 a, u32 d, SH2 *sh2)
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Pico32x.sh2_regs[0] &= ~0x80;
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Pico32x.sh2_regs[0] |= d & 0x80;
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if ((d ^ old) & 1)
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if ((old ^ d) & 1)
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p32x_pwm_schedule_sh2(sh2);
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if ((old ^ d) & 2)
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p32x_update_cmd_irq(sh2, 0);
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@ -1776,7 +1776,7 @@ static void REGPARM(3) sh2_write16_rom(u32 a, u32 d, SH2 *sh2)
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// Presumably the write goes to the CPU cache and is read back from there,
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// but it would be extremely costly to emulate cache behaviour. Just allow
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// writes to that region, hoping that the original ROM values are never used.
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if ((a1 & 0x3e0000) == 0x3e0000)
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if ((a1 & 0x3e0000) == 0x3e0000 && (PicoIn.quirks & PQUIRK_WWFRAW_HACK))
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((u16 *)sh2->p_rom)[a1 / 2] = d;
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else
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sh2_write16_unmapped(a, d, sh2);
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@ -1951,6 +1951,16 @@ void *p32x_sh2_get_mem_ptr(u32 a, u32 *mask, SH2 *sh2)
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return ret;
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}
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int p32x_sh2_mem_is_rom(u32 a, SH2 *sh2)
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{
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if ((a & 0xc6000000) == 0x02000000) {
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// ROM, but mind tweak for WWF Raw
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return !(PicoIn.quirks & PQUIRK_WWFRAW_HACK) || (a & 0x3f0000) < 0x3e0000;
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}
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return 0;
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}
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int p32x_sh2_memcpy(u32 dst, u32 src, int count, int size, SH2 *sh2)
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{
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u32 mask;
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