Commit graph

170 commits

Author SHA1 Message Date
kub
a1ca8377c9 sh2 drc, fix oversize blocks ending with JSR/BSR 2021-03-16 21:42:50 +01:00
kub
2d2387b293 sh2 drc, fix reading from constant memory address 2021-03-16 21:42:50 +01:00
kub
57c5a5e505 add big endian platform support 2021-02-22 22:27:51 +01:00
kub
4cc0fcaf15 fixes and improvements for type issues, part 3 2021-02-06 01:14:07 +01:00
kub
8094d3362f sh2 drc, powerpc fixes for OSX, 32 bit, cache handling 2021-01-30 09:03:01 +01:00
kub
1dee74458b sh2 drc, fix for MIPS EABI 2021-01-13 23:14:00 +01:00
kub
f821bb7011 core, structural cleanup, fixes and improvements for type issues #2 2021-01-01 12:44:02 +01:00
kub
a20300bf1e fixes for memory leaks and out of bounds memory access found by ASAN or gcc -flto 2020-12-12 14:57:56 +01:00
kub
7e5b769d8f libretro, improve ps2 support, switchable renderers, 32X support w/ DRC 2020-12-12 14:51:44 +01:00
kub
42077979ca drc, fix libretro removing of gcc-only syntax 2020-12-05 15:17:48 +01:00
kub
61d76999d7 Merge from libretro/master:46902e0 for repo synchronization 2020-12-05 22:39:06 +01:00
kub
efb6bc7d73 sh2 drc, fix for mapping in register cache 2020-11-23 00:24:34 +01:00
kub
7082729e06 sh2 drc, fix sh2 reg enum usage 2020-11-01 22:55:48 +01:00
kub
fde25b40fe sh2 drc, fix PIC function calling for MIPS backend 2020-10-31 21:05:27 +01:00
kub
69c22514b0 sh2 drc, fixes for cache handling on arm and mips cpus 2020-10-27 18:05:49 +01:00
kub
4153006fb8 sh2 drc, fix for cpu cache handling 2020-10-10 14:21:10 +02:00
kub
b286d66f7b sh2 drc, improve T bit propagation 2020-10-10 09:44:15 +02:00
kub
0de604b1ff sh2 drc, fix for cpu cache handling 2020-10-10 09:42:55 +02:00
kub
48b648070b sh2 drc, fix symbol clash 2020-09-18 00:25:54 +02:00
kub
368c918050 sh2 drc, optimize standard division insns (default off, needs more scrutiny) 2020-07-14 00:21:33 +02:00
twinaphex
9257c0c5c8 Buildfix 2020-07-14 00:21:33 +02:00
twinaphex
182b8d01f9 Make sure function prototype signatures match, and put typedefs into
separate header file
2020-07-13 09:51:09 +02:00
kub
b1ccc27109 sh2, fix for interpreter crash if drc is compiled in too 2020-07-09 08:40:35 +02:00
kub
6b67b6aa13 libretro, more fixes and cleanups for windows and osx 2020-07-08 20:46:46 +02:00
kub
dd67441606 sh2 drc, optimisation for SH2 16x16 multiplication 2020-06-23 23:43:53 +02:00
kub
8bb489470a sh2 drc, add powerpc64le backend 2020-06-19 00:14:28 +02:00
kub
904fb98e6c sh2: optimisations in drc 2020-05-06 23:06:31 +02:00
kub
4321a689a5 sh2: bugfix in drc 2020-04-27 09:33:23 +02:00
kub
2eb213314a sh2, optimizations to innermost run loop 2020-04-22 21:49:02 +02:00
kub
74cc7aebf6 sh2 timer optimization 2020-04-13 22:20:13 +02:00
kub
b9bc876c9c bug fixes in drc, audio, display 2020-01-14 22:49:03 +01:00
kub
0e12269073 sh2 drc: optimize T bit handling for A64 2019-12-21 22:49:41 +01:00
kub
a5e51c16e6 sh2 drc: fix speed regression 2019-12-13 18:23:03 +01:00
kub
90b1c9db91 sh2 drc: cleanup, fix for drc crash, for mips code emitter 2019-12-11 20:39:27 +01:00
kub
57d863cb87 sh2 drc: bug fixing 2019-11-27 22:08:14 +01:00
kub
f2d19ddf2a sh2 drc, small improvements and bug fixes for code emitters 2019-11-19 21:59:44 +01:00
kub
cf0dd6ae48 sh2 drc, improved memory management 2019-11-19 21:56:50 +01:00
kub
e7ee501075 sh2 drc: RISC-V (RV64IM) code emitter, some work on MIPS64 2019-11-13 21:56:11 +01:00
kub
aaea8e3ecd sh2 drc: optimizations for MIPS code emitting 2019-11-09 10:30:57 +01:00
kub
9bd6706dca sh2 drc: moved host register assignment to code emitters, minor bugfixing 2019-11-09 10:24:52 +01:00
kub
7e940f142e 32x, finetuning 2019-10-19 08:53:28 +02:00
kub
1fd8f98696 fix gp2x regression 2019-10-18 00:16:54 +02:00
kub
52055c13b2 sh2 drc: reorganised block mgmt code, plus some small scale optimisations 2019-10-17 21:54:37 +02:00
kub
b10a782a36 sh2 drc: bugfix in block management 2019-10-12 11:19:55 +02:00
kub
6b9ded20a0 sh2 drc: bugfix in block management 2019-10-12 11:10:28 +02:00
kub
7869213d35 sh2 drc: speed optimization and bugfixing 2019-10-11 00:51:19 +02:00
kub
c3ebe082d3 sh2 drc: fix i386 regression 2019-10-05 11:17:49 +02:00
kub
a0f5ba4067 sh2 drc: bug fixing and optimization in register cache and branch handling 2019-10-04 17:11:18 +02:00
kub
32818177bd sh2 drc: drc exit, block linking and branch handling revised (overlooked commit) 2019-09-28 17:12:56 +02:00
kub
06bc3c0693 sh2 drc: drc exit, block linking and branch handling revised 2019-09-28 16:39:26 +02:00