mirror of
https://github.com/RaySollium99/picodrive.git
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537 lines
13 KiB
C
537 lines
13 KiB
C
/*
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* SMS emulation
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* (C) notaz, 2009-2010
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*
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* This work is licensed under the terms of MAME license.
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* See COPYING file in the top-level directory.
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*/
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/*
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* TODO:
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* - start in a state as if BIOS ran
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* - region support
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* - H counter
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*/
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#include "pico_int.h"
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#include "memory.h"
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#include "sound/sn76496.h"
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#include "sound/emu2413/emu2413.h"
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extern void YM2413_regWrite(unsigned reg);
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extern void YM2413_dataWrite(unsigned data);
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static int vdp_lastline;
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static unsigned char vdp_data_read(void)
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{
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struct PicoVideo *pv = &Pico.video;
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unsigned char d;
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d = Pico.ms.vdp_buffer;
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Pico.ms.vdp_buffer = PicoMem.vramb[MEM_LE2(pv->addr)];
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pv->addr = (pv->addr + 1) & 0x3fff;
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pv->pending = 0;
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return d;
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}
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static unsigned char vdp_ctl_read(void)
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{
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struct PicoVideo *pv = &Pico.video;
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unsigned char d;
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z80_int_assert(0);
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d = pv->status | (pv->pending_ints << 7);
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pv->pending = pv->pending_ints = 0;
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pv->status = 0;
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if (pv->reg[0] & 0x04)
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d |= 0x1f; // unused bits in mode 4 read as 1
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// the vint state must be set one instruction in advance, else reading status
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// would never report vint before the irq handler, which it does on a real SMS
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if (vdp_lastline && z80_cyclesLeft < 10) // e.g. Chicago GG
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d |= 0x80;
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elprintf(EL_SR, "VDP sr: %02x", d);
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return d;
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}
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static void vdp_data_write(unsigned char d)
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{
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struct PicoVideo *pv = &Pico.video;
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if (pv->type == 3) {
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if (Pico.m.hardware & 0x1) { // GG, same layout as MD
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unsigned a = pv->addr & 0x3f;
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if (a & 0x1) { // write complete color on high byte write
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u16 c = ((d&0x0f) << 8) | Pico.ms.vdp_buffer;
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if (PicoMem.cram[a >> 1] != c) Pico.m.dirtyPal = 1;
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PicoMem.cram[a >> 1] = c;
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}
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} else { // SMS, convert to MD layout (00BbGgRr to 0000BbBbGgGgRrRr)
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unsigned a = pv->addr & 0x1f;
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u16 c = ((d&0x30)<<6) + ((d&0x0c)<<4) + ((d&0x03)<<2);
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if (PicoMem.cram[a] != (c | (c>>2))) Pico.m.dirtyPal = 1;
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PicoMem.cram[a] = c | (c>>2);
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}
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} else {
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PicoMem.vramb[MEM_LE2(pv->addr)] = d;
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}
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pv->addr = (pv->addr + 1) & 0x3fff;
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Pico.ms.vdp_buffer = d;
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pv->pending = 0;
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}
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static NOINLINE void vdp_reg_write(struct PicoVideo *pv, u8 a, u8 d)
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{
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int l;
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pv->reg[a] = d;
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switch (a) {
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case 0:
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l = pv->pending_ints & (d >> 3) & 2;
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elprintf(EL_INTS, "hint %d", l);
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z80_int_assert(l);
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break;
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case 1:
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l = pv->pending_ints & (d >> 5) & 1;
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elprintf(EL_INTS, "vint %d", l);
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z80_int_assert(l);
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break;
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}
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}
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static void vdp_ctl_write(u8 d)
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{
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struct PicoVideo *pv = &Pico.video;
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if (pv->pending) {
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pv->type = d >> 6;
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if (pv->type == 2) {
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elprintf(EL_IO, " VDP r%02x=%02x", d & 0x0f, pv->addr & 0xff);
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if (pv->reg[d & 0x0f] != (u8)pv->addr)
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vdp_reg_write(pv, d & 0x0f, pv->addr);
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}
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pv->addr &= 0x00ff;
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pv->addr |= (d & 0x3f) << 8;
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if (pv->type == 0) {
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Pico.ms.vdp_buffer = PicoMem.vramb[MEM_LE2(pv->addr)];
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pv->addr = (pv->addr + 1) & 0x3fff;
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}
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} else {
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pv->addr &= 0x3f00;
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pv->addr |= d;
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}
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pv->pending ^= 1;
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}
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static unsigned char z80_sms_in(unsigned short a)
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{
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unsigned char d = 0xff;
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a &= 0xff;
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elprintf(EL_IO, "z80 port %04x read", a);
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if(a >= 0xf0){
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if (PicoIn.opt & POPT_EN_YM2413){
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switch(a)
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{
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case 0xf0:
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// FM reg port
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break;
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case 0xf1:
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// FM data port
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break;
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case 0xf2:
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// bit 0 = 1 active FM Pac
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d = 0xf8 | Pico.ms.fm_ctl;
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break;
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}
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}
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}
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else{
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switch (a & 0xc1)
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{
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case 0x00:
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case 0x01:
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if ((Pico.m.hardware & 0x1) && a < 0x8) { // GG I/O area
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switch (a) {
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case 0: d = 0xff & ~(PicoIn.pad[0] & 0x80); break;
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case 1: d = Pico.ms.io_gg[1] | Pico.ms.io_gg[2]; break;
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case 5: d = Pico.ms.io_gg[5] & 0xf8; break;
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default: d = Pico.ms.io_gg[a]; break;
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}
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}
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break;
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case 0x40: /* V counter */
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d = Pico.video.v_counter;
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elprintf(EL_HVCNT, "V counter read: %02x", d);
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break;
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case 0x41: /* H counter */
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d = Pico.ms.vdp_hlatch;
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elprintf(EL_HVCNT, "H counter read: %02x", d);
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break;
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case 0x80:
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d = vdp_data_read();
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break;
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case 0x81:
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d = vdp_ctl_read();
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break;
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case 0xc0: /* I/O port A and B */
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d = ~((PicoIn.pad[0] & 0x3f) | (PicoIn.pad[1] << 6));
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break;
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case 0xc1: /* I/O port B and miscellaneous */
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d = (Pico.ms.io_ctl & 0x80) | ((Pico.ms.io_ctl << 1) & 0x40) | 0x30;
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d |= ~(PicoIn.pad[1] >> 2) & 0x0f;
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break;
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}
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}
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elprintf(EL_IO, "ret = %02x", d);
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return d;
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}
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static void z80_sms_out(unsigned short a, unsigned char d)
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{
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elprintf(EL_IO, "z80 port %04x write %02x", a, d);
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a &= 0xff;
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if(a >= 0xf0){
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if (PicoIn.opt & POPT_EN_YM2413){
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switch(a)
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{
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case 0xf0:
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// FM reg port
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YM2413_regWrite(d);
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break;
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case 0xf1:
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// FM data port
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YM2413_dataWrite(d);
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break;
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case 0xf2:
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// bit 0 = 1 active FM Pac
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Pico.ms.fm_ctl = d & 0x1;
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break;
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}
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}
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}
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else{
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switch (a & 0xc1)
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{
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case 0x00:
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if ((Pico.m.hardware & 0x1) && a < 0x8) // GG I/O area
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Pico.ms.io_gg[a] = d;
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break;
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case 0x01:
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if ((Pico.m.hardware & 0x1) && a < 0x8) { // GG I/O area
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Pico.ms.io_gg[a] = d;
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} else {
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// pad. latch hcounter if one of the TH lines is switched to 1
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if ((Pico.ms.io_ctl ^ d) & d & 0xa0) {
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unsigned c = 228-z80_cyclesLeft;
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// 171 slots per scanline of 228 clocks, counted 0xf4-0x93,0xe9-0xf3
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// this matches h counter tables in SMSVDPTest
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c = (((c+2) * ((171<<8)/228))>>8)-1 + 0xf4; // Q8 to avoid dividing
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if (c > 0x193) c += 0xe9-0x93-1;
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Pico.ms.vdp_hlatch = (u8)c;
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}
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Pico.ms.io_ctl = d;
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}
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break;
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case 0x40:
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case 0x41:
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PsndDoPSG(Pico.m.scanline*228 + 228-z80_cyclesLeft);
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SN76496Write(d);
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break;
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case 0x80:
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vdp_data_write(d);
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break;
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case 0x81:
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vdp_ctl_write(d);
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break;
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}
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}
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}
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static int bank_mask;
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static void xwrite(unsigned int a, unsigned char d);
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static void write_sram(unsigned short a, unsigned char d)
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{
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// SRAM is mapped in 2 16KB banks, selected by bit 2 in control reg
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a &= 0x3fff;
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a += ((Pico.ms.carthw[0x0c] & 0x04) >> 2) * 0x4000;
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Pico.sv.changed |= (Pico.sv.data[a] != d);
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Pico.sv.data[a] = d;
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}
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// 16KB bank mapping for Sega mapper
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static void write_bank_sega(unsigned short a, unsigned char d)
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{
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if (Pico.ms.mapper != 1 && d == 0) return;
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elprintf(EL_Z80BNK, "bank 16k %04x %02x @ %04x", a, d, z80_pc());
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Pico.ms.mapper = 1;
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Pico.ms.carthw[a & 0x0f] = d;
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switch (a & 0x0f)
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{
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case 0x0d:
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d &= bank_mask;
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z80_map_set(z80_read_map, 0x0400, 0x3fff, Pico.rom+0x400 + (d << 14), 0);
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break;
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case 0x0e:
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d &= bank_mask;
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z80_map_set(z80_read_map, 0x4000, 0x7fff, Pico.rom + (d << 14), 0);
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break;
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case 0x0c:
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if (d & ~0x8c)
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elprintf(EL_STATUS|EL_ANOMALY, "%02x written to control reg!", d);
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/*FALLTHROUGH*/
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case 0x0f:
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if (Pico.ms.carthw[0xc] & 0x08) {
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d = (Pico.ms.carthw[0xc] & 0x04) >> 2;
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z80_map_set(z80_read_map, 0x8000, 0xbfff, Pico.sv.data + d*0x4000, 0);
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z80_map_set(z80_write_map, 0x8000, 0xbfff, write_sram, 1);
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} else {
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d = Pico.ms.carthw[0xf] & bank_mask;
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z80_map_set(z80_read_map, 0x8000, 0xbfff, Pico.rom + (d << 14), 0);
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z80_map_set(z80_write_map, 0x8000, 0xbfff, xwrite, 1);
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}
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break;
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}
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}
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// 8KB ROM mapping for MSX mapper
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static void write_bank_msx(unsigned short a, unsigned char d)
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{
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if (Pico.ms.mapper != 2 && (a|d) == 0) return;
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elprintf(EL_Z80BNK, "bank 8k %04x %02x @ %04x", a, d, z80_pc());
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Pico.ms.mapper = 2; // TODO define (more) mapper types
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Pico.ms.carthw[a] = d;
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a = (a^2)*0x2000 + 0x4000;
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d &= 2*bank_mask + 1;
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z80_map_set(z80_read_map, a, a+0x1fff, Pico.rom + (d << 13), 0);
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}
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// TODO mapping is currently auto-selecting, but that's not very reliable.
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static void xwrite(unsigned int a, unsigned char d)
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{
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elprintf(EL_IO, "z80 write [%04x] %02x", a, d);
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if (a >= 0xc000)
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PicoMem.zram[a & 0x1fff] = d;
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// Sega. Maps 4 bank 16KB each
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if (a >= 0xfff8 && Pico.ms.mapper != 2)
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write_bank_sega(a, d);
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// Codemasters. Similar to Sega, but different addresses
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// if (a == 0x0000 && Pico.ms.mapper != 2)
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// write_bank_sega(0xfffd, d);
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if (a == 0x4000 && Pico.ms.mapper != 2)
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write_bank_sega(0xfffe, d);
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if (a == 0x8000 && Pico.ms.mapper != 2)
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write_bank_sega(0xffff, d);
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// Korean. 1 selectable 16KB bank at the top
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if (a == 0xa000 && Pico.ms.mapper != 2)
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write_bank_sega(0xffff, d);
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// MSX. 4 selectable 8KB banks at the top
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if (a <= 0x0003 && Pico.ms.mapper != 1)
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write_bank_msx(a, d);
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}
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void PicoResetMS(void)
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{
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z80_reset();
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PsndReset(); // pal must be known here
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Pico.ms.fm_ctl = 0xff;
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Pico.m.dirtyPal = 1;
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if (PicoIn.hwSelect) {
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switch (PicoIn.hwSelect) {
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case PHWS_GG: Pico.m.hardware |= 0x1; break;
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default: Pico.m.hardware &= ~0x1; break;
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}
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} else {
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unsigned tmr;
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// check if the ROM header contains more system information to detect GG
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for (tmr = 0x2000; tmr < 0xbfff && tmr <= Pico.romsize; tmr *= 2) {
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if (!memcmp(Pico.rom + tmr-16, "TMR SEGA", 8)) {
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if (Pico.rom[tmr-1] >= 0x50 && Pico.rom[tmr-1] < 0x80)
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Pico.m.hardware |= 0x1;
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break;
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}
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}
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}
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// reset memory mapping
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PicoMemSetupMS();
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}
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void PicoPowerMS(void)
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{
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int s, tmp;
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memset(&PicoMem,0,sizeof(PicoMem));
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memset(&Pico.video,0,sizeof(Pico.video));
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memset(&Pico.m,0,sizeof(Pico.m));
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Pico.m.pal = 0;
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// calculate a mask for bank writes.
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// ROM loader has aligned the size for us, so this is safe.
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s = 0; tmp = Pico.romsize;
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while ((tmp >>= 1) != 0)
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s++;
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if (Pico.romsize > (1 << s))
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s++;
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tmp = 1 << s;
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bank_mask = (tmp - 1) >> 14;
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Pico.ms.mapper = 0;
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PicoReset();
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}
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void PicoMemSetupMS(void)
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{
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z80_map_set(z80_read_map, 0x0000, 0xbfff, Pico.rom, 0);
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z80_map_set(z80_read_map, 0xc000, 0xdfff, PicoMem.zram, 0);
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z80_map_set(z80_read_map, 0xe000, 0xffff, PicoMem.zram, 0);
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z80_map_set(z80_write_map, 0x0000, 0xbfff, xwrite, 1);
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z80_map_set(z80_write_map, 0xc000, 0xdfff, PicoMem.zram, 0);
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z80_map_set(z80_write_map, 0xe000, 0xffff, xwrite, 1);
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#ifdef _USE_DRZ80
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drZ80.z80_in = z80_sms_in;
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drZ80.z80_out = z80_sms_out;
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#endif
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#ifdef _USE_CZ80
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Cz80_Set_INPort(&CZ80, z80_sms_in);
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Cz80_Set_OUTPort(&CZ80, z80_sms_out);
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#endif
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// memory mapper setup
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u8 mapper = Pico.ms.mapper;
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if (Pico.ms.mapper == 2) {
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xwrite(0x0000, 0);
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xwrite(0x0001, 0);
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xwrite(0x0002, 0);
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xwrite(0x0003, 0);
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} else {
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xwrite(0xfffc, 0);
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xwrite(0xfffd, 0);
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xwrite(0xfffe, 1);
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xwrite(0xffff, 2);
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}
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Pico.ms.mapper = mapper;
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}
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void PicoStateLoadedMS(void)
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{
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u8 mapper = Pico.ms.mapper;
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if (Pico.ms.mapper == 2) {
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xwrite(0x0000, Pico.ms.carthw[0]);
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xwrite(0x0001, Pico.ms.carthw[1]);
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xwrite(0x0002, Pico.ms.carthw[2]);
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xwrite(0x0003, Pico.ms.carthw[3]);
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} else {
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xwrite(0xfffc, Pico.ms.carthw[0x0c]);
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xwrite(0xfffd, Pico.ms.carthw[0x0d]);
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xwrite(0xfffe, Pico.ms.carthw[0x0e]);
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xwrite(0xffff, Pico.ms.carthw[0x0f]);
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}
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Pico.ms.mapper = mapper;
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}
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void PicoFrameMS(void)
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{
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struct PicoVideo *pv = &Pico.video;
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int is_pal = Pico.m.pal;
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int lines = is_pal ? 313 : 262;
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int cycles_line = 228;
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int cycles_done = 0, cycles_aim = 0;
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int skip = PicoIn.skipFrame;
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int lines_vis = 192;
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int hint; // Hint counter
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int nmi;
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int y;
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PsndStartFrame();
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nmi = (PicoIn.pad[0] >> 7) & 1;
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if (!Pico.ms.nmi_state && nmi)
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z80_nmi();
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Pico.ms.nmi_state = nmi;
|
|
|
|
if ((pv->reg[0] & 6) == 6 && (pv->reg[1] & 0x18))
|
|
lines_vis = (pv->reg[1] & 0x08) ? 240 : 224;
|
|
PicoFrameStartSMS();
|
|
hint = pv->reg[0x0a];
|
|
|
|
for (y = 0; y < lines; y++)
|
|
{
|
|
vdp_lastline = lines_vis == y;
|
|
pv->v_counter = Pico.m.scanline = y;
|
|
if (y > 218)
|
|
pv->v_counter = y - 6;
|
|
|
|
if (y < lines_vis && !skip)
|
|
PicoLineSMS(y);
|
|
|
|
if (y <= lines_vis)
|
|
{
|
|
if (--hint < 0)
|
|
{
|
|
hint = pv->reg[0x0a];
|
|
pv->pending_ints |= 2;
|
|
if (pv->reg[0] & 0x10) {
|
|
elprintf(EL_INTS, "hint");
|
|
z80_int_assert(1);
|
|
}
|
|
} else if (pv->pending_ints & 2) {
|
|
pv->pending_ints &= ~2;
|
|
z80_int_assert(0);
|
|
}
|
|
}
|
|
else if (y == lines_vis + 1) {
|
|
pv->pending_ints &= ~2;
|
|
pv->pending_ints |= 1;
|
|
if (pv->reg[1] & 0x20) {
|
|
elprintf(EL_INTS, "vint");
|
|
z80_int_assert(1);
|
|
} else
|
|
z80_int_assert(0);
|
|
}
|
|
|
|
cycles_aim += cycles_line;
|
|
Pico.t.z80c_aim = cycles_aim;
|
|
cycles_done += z80_run(cycles_aim - cycles_done);
|
|
}
|
|
|
|
if (PicoIn.sndOut)
|
|
PsndGetSamplesMS(lines);
|
|
}
|
|
|
|
void PicoFrameDrawOnlyMS(void)
|
|
{
|
|
int lines_vis = 192;
|
|
int y;
|
|
|
|
PicoFrameStartSMS();
|
|
|
|
for (y = 0; y < lines_vis; y++)
|
|
PicoLineSMS(y);
|
|
}
|
|
|
|
// vim:ts=2:sw=2:expandtab
|