mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 07:17:45 -04:00

- PicoDrive was originally released by fDave with simple "free for non-commercial use / For commercial use, separate licencing terms must be obtained" license and I kept it in my releases. - in 2011, fDave re-released his code (same that I used as base many years ago) dual licensed with GPLv2 and MAME licenses: https://code.google.com/p/cyclone68000/ Based on the above I now proclaim that the whole source code is licensed under the MAME license as more elaborate form of "for non-commercial use". If that raises any doubt, I announce that all my modifications (which is the vast majority of code by now) is licensed under the MAME license, as it reads in COPYING file in this commit. This does not affect ym2612.c/sn76496.c that were MAME licensed already from the beginning.
377 lines
9.7 KiB
C
377 lines
9.7 KiB
C
/*
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* PicoDrive
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* (c) Copyright Dave, 2004
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* (C) notaz, 2006-2010
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*
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* This work is licensed under the terms of MAME license.
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* See COPYING file in the top-level directory.
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*/
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#include "pico_int.h"
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#include "sound/ym2612.h"
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struct Pico Pico;
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int PicoOpt;
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int PicoSkipFrame; // skip rendering frame?
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int PicoPad[2]; // Joypads, format is MXYZ SACB RLDU
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int PicoPadInt[2]; // internal copy
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int PicoAHW; // active addon hardware: PAHW_*
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int PicoRegionOverride; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe
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int PicoAutoRgnOrder;
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struct PicoSRAM SRam;
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int emustatus; // rapid_ym2612, multi_ym_updates
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int scanlines_total;
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int p32x_msh2_multiplier = MSH2_MULTI_DEFAULT;
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int p32x_ssh2_multiplier = SSH2_MULTI_DEFAULT;
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void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware
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void (*PicoResetHook)(void) = NULL;
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void (*PicoLineHook)(void) = NULL;
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// to be called once on emu init
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void PicoInit(void)
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{
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// Blank space for state:
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memset(&Pico,0,sizeof(Pico));
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memset(&PicoPad,0,sizeof(PicoPad));
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memset(&PicoPadInt,0,sizeof(PicoPadInt));
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// Init CPUs:
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SekInit();
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z80_init(); // init even if we aren't going to use it
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PicoInitMCD();
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PicoSVPInit();
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Pico32xInit();
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}
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// to be called once on emu exit
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void PicoExit(void)
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{
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if (PicoAHW & PAHW_MCD)
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PicoExitMCD();
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PicoCartUnload();
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z80_exit();
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if (SRam.data)
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free(SRam.data);
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}
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void PicoPower(void)
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{
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Pico.m.frame_count = 0;
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// clear all memory of the emulated machine
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memset(&Pico.ram,0,(unsigned char *)&Pico.rom - Pico.ram);
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memset(&Pico.video,0,sizeof(Pico.video));
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memset(&Pico.m,0,sizeof(Pico.m));
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Pico.video.pending_ints=0;
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z80_reset();
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// default VDP register values (based on Fusion)
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Pico.video.reg[0] = Pico.video.reg[1] = 0x04;
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Pico.video.reg[0xc] = 0x81;
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Pico.video.reg[0xf] = 0x02;
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if (PicoAHW & PAHW_MCD)
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PicoPowerMCD();
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if (PicoOpt & POPT_EN_32X)
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PicoPower32x();
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PicoReset();
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}
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PICO_INTERNAL void PicoDetectRegion(void)
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{
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int support=0, hw=0, i;
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unsigned char pal=0;
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if (PicoRegionOverride)
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{
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support = PicoRegionOverride;
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}
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else
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{
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// Read cartridge region data:
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unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);
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int region = (rd[0] << 16) | rd[1];
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for (i = 0; i < 4; i++)
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{
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int c;
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c = region >> (i<<3);
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c &= 0xff;
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if (c <= ' ') continue;
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if (c=='J') support|=1;
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else if (c=='U') support|=4;
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else if (c=='E') support|=8;
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else if (c=='j') {support|=1; break; }
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else if (c=='u') {support|=4; break; }
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else if (c=='e') {support|=8; break; }
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else
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{
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// New style code:
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char s[2]={0,0};
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s[0]=(char)c;
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support|=strtol(s,NULL,16);
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}
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}
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}
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// auto detection order override
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if (PicoAutoRgnOrder) {
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if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;
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else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;
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else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;
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}
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// Try to pick the best hardware value for English/50hz:
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if (support&8) { hw=0xc0; pal=1; } // Europe
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else if (support&4) hw=0x80; // USA
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else if (support&2) { hw=0x40; pal=1; } // Japan PAL
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else if (support&1) hw=0x00; // Japan NTSC
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else hw=0x80; // USA
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Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached
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Pico.m.pal=pal;
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}
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int PicoReset(void)
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{
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if (Pico.romsize <= 0)
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return 1;
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/* must call now, so that banking is reset, and correct vectors get fetched */
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if (PicoResetHook)
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PicoResetHook();
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memset(&PicoPadInt,0,sizeof(PicoPadInt));
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emustatus = 0;
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if (PicoAHW & PAHW_SMS) {
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PicoResetMS();
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return 0;
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}
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SekReset();
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// s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).
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SekSetRealTAS(PicoAHW & PAHW_MCD);
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SekCycleCntT=0;
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if (PicoAHW & PAHW_MCD)
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// needed for MCD to reset properly, probably some bug hides behind this..
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memset(Pico.ioports,0,sizeof(Pico.ioports));
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Pico.m.dirtyPal = 1;
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Pico.m.z80_bank68k = 0;
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Pico.m.z80_reset = 1;
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memset(Pico.zram, 0, sizeof(Pico.zram)); // ??
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PicoDetectRegion();
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Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal
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PsndReset(); // pal must be known here
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// create an empty "dma" to cause 68k exec start at random frame location
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if (Pico.m.dma_xfers == 0 && !(PicoOpt & POPT_DIS_VDP_FIFO))
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Pico.m.dma_xfers = rand() & 0x1fff;
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SekFinishIdleDet();
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if (PicoAHW & PAHW_MCD) {
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PicoResetMCD();
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return 0;
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}
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// reinit, so that checksum checks pass
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if (!(PicoOpt & POPT_DIS_IDLE_DET))
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SekInitIdleDet();
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if (PicoOpt & POPT_EN_32X)
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PicoReset32x();
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// reset sram state; enable sram access by default if it doesn't overlap with ROM
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Pico.m.sram_reg = 0;
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if ((SRam.flags & SRF_EEPROM) || Pico.romsize <= SRam.start)
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Pico.m.sram_reg |= SRR_MAPPED;
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if (SRam.flags & SRF_ENABLED)
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elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", SRam.start, SRam.end,
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!!(SRam.flags & SRF_EEPROM));
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return 0;
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}
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// flush config changes before emu loop starts
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void PicoLoopPrepare(void)
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{
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if (PicoRegionOverride)
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// force setting possibly changed..
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Pico.m.pal = (PicoRegionOverride == 2 || PicoRegionOverride == 8) ? 1 : 0;
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// FIXME: PAL has 313 scanlines..
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scanlines_total = Pico.m.pal ? 312 : 262;
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if (PicoAHW & PAHW_32X)
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p32x_timers_recalc();
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}
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// dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)
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// same for Outrunners (92-121, when active is set to 24)
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// 96 is VR hack
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static const int dma_timings[] = {
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96, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy
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102, 205, 204, 102, // vblank: 40cell:
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16, 16, 15, 8, // active: 32cell:
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24, 18, 17, 9 // ...
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};
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static const int dma_bsycles[] = {
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(488<<8)/96, (488<<8)/167, (488<<8)/166, (488<<8)/83,
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(488<<8)/102, (488<<8)/205, (488<<8)/204, (488<<8)/102,
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(488<<8)/16, (488<<8)/16, (488<<8)/15, (488<<8)/8,
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(488<<8)/24, (488<<8)/18, (488<<8)/17, (488<<8)/9
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};
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PICO_INTERNAL int CheckDMA(void)
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{
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int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes
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int xfers = Pico.m.dma_xfers;
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int dma_op1;
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if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens
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dma_op1 = dma_op;
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if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?
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if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?
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xfers_can = dma_timings[dma_op];
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if(xfers <= xfers_can)
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{
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if(dma_op&2) Pico.video.status&=~2; // dma no longer busy
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else {
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burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..
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}
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Pico.m.dma_xfers = 0;
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} else {
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if(!(dma_op&2)) burn = 488;
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Pico.m.dma_xfers -= xfers_can;
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}
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elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%i]", Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());
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//dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);
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return burn;
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}
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static __inline void SekRunM68k(int cyc)
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{
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int cyc_do;
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pprof_start(m68k);
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SekCycleAim+=cyc;
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if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;
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#if defined(EMU_CORE_DEBUG)
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// this means we do run-compare
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SekCycleCnt+=CM_compareRun(cyc_do, 0);
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#elif defined(EMU_C68K)
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PicoCpuCM68k.cycles=cyc_do;
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CycloneRun(&PicoCpuCM68k);
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SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;
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#elif defined(EMU_M68K)
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SekCycleCnt+=m68k_execute(cyc_do);
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#elif defined(EMU_F68K)
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SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0);
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#endif
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pprof_end(m68k);
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}
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#include "pico_cmn.c"
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int z80stopCycle;
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int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */
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int z80_cycle_aim;
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int z80_scanline;
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int z80_scanline_cycles; /* cycles done until z80_scanline */
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/* sync z80 to 68k */
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PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done)
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{
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int cnt;
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z80_cycle_aim = cycles_68k_to_z80(m68k_cycles_done);
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cnt = z80_cycle_aim - z80_cycle_cnt;
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pprof_start(z80);
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elprintf(EL_BUSREQ, "z80 sync %i (%i|%i -> %i|%i)", cnt, z80_cycle_cnt, z80_cycle_cnt / 228,
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z80_cycle_aim, z80_cycle_aim / 228);
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if (cnt > 0)
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z80_cycle_cnt += z80_run(cnt);
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pprof_end(z80);
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}
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void PicoFrame(void)
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{
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pprof_start(frame);
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Pico.m.frame_count++;
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if (PicoAHW & PAHW_SMS) {
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PicoFrameMS();
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goto end;
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}
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// TODO: MCD+32X
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if (PicoAHW & PAHW_MCD) {
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PicoFrameMCD();
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goto end;
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}
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if (PicoAHW & PAHW_32X) {
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PicoFrame32x();
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goto end;
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}
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//if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode
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PicoFrameStart();
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PicoFrameHints();
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end:
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pprof_end(frame);
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}
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void PicoFrameDrawOnly(void)
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{
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if (!(PicoAHW & PAHW_SMS)) {
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PicoFrameStart();
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PicoDrawSync(223, 0);
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} else {
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PicoFrameDrawOnlyMS();
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}
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}
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void PicoGetInternal(pint_t which, pint_ret_t *r)
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{
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switch (which)
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{
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case PI_ROM: r->vptr = Pico.rom; break;
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case PI_ISPAL: r->vint = Pico.m.pal; break;
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case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;
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case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;
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}
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}
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// callback to output message from emu
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void (*PicoMessage)(const char *msg)=NULL;
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