mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
4ea707e1e3
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@786 be3aeb3a-fb24-0410-a615-afba39da0efa
806 lines
18 KiB
C
806 lines
18 KiB
C
#include "../pico_int.h"
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#include "../memory.h"
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static const char str_mars[] = "MARS";
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struct Pico32xMem *Pico32xMem;
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static void bank_switch(int b);
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#define MSB8(x) ((x) >> 8)
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// poll detection
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#define POLL_THRESHOLD 6
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struct poll_det {
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int addr, pc, cnt;
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};
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static struct poll_det m68k_poll, msh2_poll;
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static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int flag)
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{
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int ret = 0;
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if (a - 2 <= pd->addr && pd->addr <= a + 2 && pd->pc == pc) {
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pd->cnt++;
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if (pd->cnt > POLL_THRESHOLD) {
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if (!(Pico32x.emu_flags & flag)) {
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elprintf(EL_32X, "%s poll addr %08x @ %06x",
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flag == P32XF_68KPOLL ? "m68k" : (flag == P32XF_MSH2POLL ? "msh2" : "ssh2"), a, pc);
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ret = 1;
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}
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Pico32x.emu_flags |= flag;
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}
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}
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else
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pd->cnt = 0;
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pd->addr = a;
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pd->pc = pc;
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return ret;
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}
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static int p32x_poll_undetect(struct poll_det *pd, int flag)
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{
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int ret = 0;
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if (pd->cnt > POLL_THRESHOLD)
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ret = 1;
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pd->addr = pd->cnt = 0;
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Pico32x.emu_flags &= ~flag;
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return ret;
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}
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void p32x_poll_event(int is_vdp)
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{
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p32x_poll_undetect(&msh2_poll, is_vdp ? P32XF_MSH2VPOLL : P32XF_MSH2POLL);
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}
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// SH2 faking
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#define FAKE_SH2
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int p32x_csum_faked;
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#ifdef FAKE_SH2
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static const u16 comm_fakevals[] = {
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0x4d5f, 0x4f4b, // M_OK
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0x535f, 0x4f4b, // S_OK
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0x4D41, 0x5346, // MASF - Brutal Unleashed
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0x5331, 0x4d31, // Darxide
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0x5332, 0x4d32,
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0x5333, 0x4d33,
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0x0000, 0x0000, // eq for doom
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0x0002, // Mortal Kombat
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// 0, // pad
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};
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static u32 sh2_comm_faker(u32 a)
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{
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static int f = 0;
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if (a == 0x28 && !p32x_csum_faked) {
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p32x_csum_faked = 1;
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return *(unsigned short *)(Pico.rom + 0x18e);
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}
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if (f >= sizeof(comm_fakevals) / sizeof(comm_fakevals[0]))
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f = 0;
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return comm_fakevals[f++];
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}
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#endif
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// DMAC handling
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static struct {
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unsigned int sar0, dar0, tcr0; // src addr, dst addr, transfer count
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unsigned int chcr0; // chan ctl
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unsigned int sar1, dar1, tcr1; // same for chan 1
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unsigned int chcr1;
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int pad[4];
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unsigned int dmaor;
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} * dmac0;
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static void dma_68k2sh2_do(void)
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{
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unsigned short *dreqlen = &Pico32x.regs[0x10 / 2];
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int i;
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if (dmac0->tcr0 != *dreqlen)
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elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen);
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for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) {
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extern void p32x_sh2_write16(u32 a, u32 d);
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elprintf(EL_32X|EL_ANOMALY, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen);
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p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i]);
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dmac0->dar0 += 2;
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dmac0->tcr0--;
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(*dreqlen)--;
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}
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Pico32x.dmac_ptr = 0; // HACK
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Pico32x.regs[6 / 2] &= ~P32XS_FULL;
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if (*dreqlen == 0)
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Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete
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if (dmac0->tcr0 == 0)
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dmac0->chcr0 |= 2; // DMA has ended normally
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p32x_poll_undetect(&m68k_poll, P32XF_68KPOLL);
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}
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// ------------------------------------------------------------------
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static u32 p32x_reg_read16(u32 a)
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{
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a &= 0x3e;
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#if 0
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if ((a & 0x30) == 0x20)
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return sh2_comm_faker(a);
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#else
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if (p32x_poll_detect(&m68k_poll, a, SekPc, P32XF_68KPOLL)) {
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SekEndRun(16);
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}
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#endif
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#ifdef FAKE_SH2
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// fake only slave for now
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if (a == 0x24 || a == 0x26)
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return sh2_comm_faker(a);
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#endif
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return Pico32x.regs[a / 2];
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}
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static void p32x_reg_write8(u32 a, u32 d)
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{
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u16 *r = Pico32x.regs;
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a &= 0x3f;
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if (a == 1 && !(r[0] & 1)) {
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r[0] |= 1;
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Pico32xStartup();
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return;
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}
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if (!(r[0] & 1))
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return;
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switch (a) {
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case 0: // adapter ctl
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r[0] = (r[0] & 0x83) | ((d << 8) & P32XS_FM);
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break;
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case 3: // irq ctl
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if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) {
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Pico32x.sh2irqi[0] |= P32XI_CMD;
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p32x_update_irls();
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}
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break;
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case 5: // bank
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d &= 7;
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if (r[4 / 2] != d) {
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r[4 / 2] = d;
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bank_switch(d);
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}
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break;
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case 7: // DREQ ctl
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r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_RV));
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break;
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}
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}
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static void p32x_reg_write16(u32 a, u32 d)
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{
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u16 *r = Pico32x.regs;
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a &= 0x3e;
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// for write loops with FIFO checks..
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m68k_poll.cnt = 0;
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switch (a) {
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case 0x00: // adapter ctl
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r[0] = (r[0] & 0x83) | (d & P32XS_FM);
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return;
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case 0x10: // DREQ len
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r[a / 2] = d & ~3;
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return;
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case 0x12: // FIFO reg
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if (!(r[6 / 2] & P32XS_68S)) {
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elprintf(EL_32X|EL_ANOMALY, "DREQ FIFO w16 without 68S?");
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return;
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}
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if (Pico32x.dmac_ptr < DMAC_FIFO_LEN) {
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Pico32x.dmac_fifo[Pico32x.dmac_ptr++] = d;
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if ((Pico32x.dmac_ptr & 3) == 0 && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1))
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dma_68k2sh2_do();
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if (Pico32x.dmac_ptr == DMAC_FIFO_LEN)
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r[6 / 2] |= P32XS_FULL;
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}
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break;
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}
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// DREQ src, dst
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if ((a & 0x38) == 0x08) {
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r[a / 2] = d;
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return;
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}
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// comm port
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else if ((a & 0x30) == 0x20 && r[a / 2] != d) {
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r[a / 2] = d;
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if (p32x_poll_undetect(&msh2_poll, P32XF_MSH2POLL))
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// if SH2 is busy waiting, it needs to see the result ASAP
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SekEndRun(16);
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return;
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}
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p32x_reg_write8(a + 1, d);
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}
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// ------------------------------------------------------------------
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// VDP regs
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static u32 p32x_vdp_read16(u32 a)
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{
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a &= 0x0e;
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return Pico32x.vdp_regs[a / 2];
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}
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static void p32x_vdp_write8(u32 a, u32 d)
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{
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u16 *r = Pico32x.vdp_regs;
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a &= 0x0f;
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// for FEN checks between writes
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msh2_poll.cnt = 0;
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// TODO: verify what's writeable
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switch (a) {
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case 0x01:
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// priority inversion is handled in palette
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if ((r[0] ^ d) & P32XV_PRI)
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Pico32x.dirty_pal = 1;
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r[0] = (r[0] & P32XV_nPAL) | (d & 0xff);
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break;
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case 0x0b:
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d &= 1;
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Pico32x.pending_fb = d;
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// if we are blanking and FS bit is changing
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if (((r[0x0a/2] & P32XV_VBLK) || (r[0] & P32XV_Mx) == 0) && ((r[0x0a/2] ^ d) & P32XV_FS)) {
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r[0x0a/2] ^= 1;
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Pico32xSwapDRAM(d ^ 1);
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elprintf(EL_32X, "VDP FS: %d", r[0x0a/2] & P32XV_FS);
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}
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break;
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}
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}
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static void p32x_vdp_write16(u32 a, u32 d)
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{
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p32x_vdp_write8(a | 1, d);
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}
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// ------------------------------------------------------------------
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// SH2 regs
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static u32 p32x_sh2reg_read16(u32 a)
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{
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u16 *r = Pico32x.regs;
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a &= 0xfe; // ?
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switch (a) {
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case 0x00: // adapter/irq ctl
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return (r[0] & P32XS_FM) | P32XS2_ADEN | Pico32x.sh2irq_mask[0];
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case 0x10: // DREQ len
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return r[a / 2];
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}
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// DREQ src, dst; comm port
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if ((a & 0x38) == 0x08 || (a & 0x30) == 0x20)
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return r[a / 2];
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return 0;
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}
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static void p32x_sh2reg_write8(u32 a, u32 d)
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{
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a &= 0xff;
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if (a == 1) {
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Pico32x.sh2irq_mask[0] = d & 0x0f;
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p32x_update_irls();
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}
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}
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static void p32x_sh2reg_write16(u32 a, u32 d)
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{
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a &= 0xfe;
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if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) {
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Pico32x.regs[a/2] = d;
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p32x_poll_undetect(&m68k_poll, P32XF_68KPOLL);
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return;
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}
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switch (a) {
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case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls;
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case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls;
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case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls;
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case 0x1a: Pico32x.sh2irqi[0] &= ~P32XI_CMD; goto irls;
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case 0x1c: Pico32x.sh2irqs &= ~P32XI_PWM; goto irls;
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}
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p32x_sh2reg_write8(a | 1, d);
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return;
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irls:
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p32x_update_irls();
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}
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static u32 sh2_peripheral_read(u32 a)
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{
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u32 d;
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a &= 0x1fc;
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d = Pico32xMem->sh2_peri_regs[0][a / 4];
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elprintf(EL_32X, "sh2 peri r32 [%08x] %08x @%06x", a, d, ash2_pc());
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return d;
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}
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static void sh2_peripheral_write(u32 a, u32 d)
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{
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unsigned int *r = Pico32xMem->sh2_peri_regs[0];
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elprintf(EL_32X, "sh2 peri w32 [%08x] %08x @%06x", a, d, ash2_pc());
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a &= 0x1fc;
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r[a / 4] = d;
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if ((a == 0x1b0 || a == 0x18c) && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) {
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elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x",
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dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, ash2_pc());
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dmac0->tcr0 &= 0xffffff;
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// DREQ is only sent after first 4 words are written.
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// we do multiple of 4 words to avoid messing up alignment
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if (dmac0->sar0 == 0x20004012 && Pico32x.dmac_ptr && (Pico32x.dmac_ptr & 3) == 0) {
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elprintf(EL_32X, "68k -> sh2 DMA");
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dma_68k2sh2_do();
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}
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}
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}
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// ------------------------------------------------------------------
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// default 32x handlers
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u32 PicoRead8_32x(u32 a)
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{
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u32 d = 0;
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if ((a & 0xffc0) == 0x5100) { // a15100
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d = p32x_reg_read16(a);
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goto out_16to8;
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}
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if (!(Pico32x.regs[0] & 1))
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goto no_vdp;
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if ((a & 0xfff0) == 0x5180) { // a15180
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d = p32x_vdp_read16(a);
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goto out_16to8;
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}
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if ((a & 0xfe00) == 0x5200) { // a15200
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d = Pico32xMem->pal[(a & 0x1ff) / 2];
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goto out_16to8;
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}
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no_vdp:
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if ((a & 0xfffc) == 0x30ec) { // a130ec
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d = str_mars[a & 3];
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goto out;
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}
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elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
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return d;
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out_16to8:
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if (a & 1)
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d &= 0xff;
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else
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d >>= 8;
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out:
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elprintf(EL_32X, "m68k 32x r8 [%06x] %02x @%06x", a, d, SekPc);
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return d;
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}
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u32 PicoRead16_32x(u32 a)
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{
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u32 d = 0;
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if ((a & 0xffc0) == 0x5100) { // a15100
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d = p32x_reg_read16(a);
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goto out;
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}
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if (!(Pico32x.regs[0] & 1))
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goto no_vdp;
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if ((a & 0xfff0) == 0x5180) { // a15180
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d = p32x_vdp_read16(a);
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goto out;
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}
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if ((a & 0xfe00) == 0x5200) { // a15200
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d = Pico32xMem->pal[(a & 0x1ff) / 2];
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goto out;
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}
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no_vdp:
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if ((a & 0xfffc) == 0x30ec) { // a130ec
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d = !(a & 2) ? ('M'<<8)|'A' : ('R'<<8)|'S';
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goto out;
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}
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elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
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return d;
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out:
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elprintf(EL_32X, "m68k 32x r16 [%06x] %04x @%06x", a, d, SekPc);
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return d;
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}
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void PicoWrite8_32x(u32 a, u32 d)
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{
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if ((a & 0xfc00) == 0x5000)
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elprintf(EL_32X, "m68k 32x w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
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if ((a & 0xffc0) == 0x5100) { // a15100
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p32x_reg_write8(a, d);
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return;
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}
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if (!(Pico32x.regs[0] & 1))
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goto no_vdp;
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if ((a & 0xfff0) == 0x5180) { // a15180
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p32x_vdp_write8(a, d);
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return;
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}
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// TODO: verify
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if ((a & 0xfe00) == 0x5200) { // a15200
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elprintf(EL_32X|EL_ANOMALY, "m68k 32x PAL w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
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((u8 *)Pico32xMem->pal)[(a & 0x1ff) ^ 1] = d;
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Pico32x.dirty_pal = 1;
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return;
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}
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no_vdp:
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elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
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}
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void PicoWrite16_32x(u32 a, u32 d)
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{
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if ((a & 0xfc00) == 0x5000)
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elprintf(EL_UIO, "m68k 32x w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
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if ((a & 0xffc0) == 0x5100) { // a15100
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p32x_reg_write16(a, d);
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return;
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}
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|
|
if (!(Pico32x.regs[0] & 1))
|
|
goto no_vdp;
|
|
|
|
if ((a & 0xfff0) == 0x5180) { // a15180
|
|
p32x_vdp_write16(a, d);
|
|
return;
|
|
}
|
|
|
|
if ((a & 0xfe00) == 0x5200) { // a15200
|
|
Pico32xMem->pal[(a & 0x1ff) / 2] = d;
|
|
Pico32x.dirty_pal = 1;
|
|
return;
|
|
}
|
|
|
|
no_vdp:
|
|
elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
|
|
}
|
|
|
|
// hint vector is writeable
|
|
static void PicoWrite8_hint(u32 a, u32 d)
|
|
{
|
|
if ((a & 0xfffc) == 0x0070) {
|
|
Pico32xMem->m68k_rom[a ^ 1] = d;
|
|
return;
|
|
}
|
|
|
|
elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
|
|
}
|
|
|
|
static void PicoWrite16_hint(u32 a, u32 d)
|
|
{
|
|
if ((a & 0xfffc) == 0x0070) {
|
|
((u16 *)Pico32xMem->m68k_rom)[a/2] = d;
|
|
return;
|
|
}
|
|
|
|
elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
|
|
}
|
|
|
|
void Pico32xSwapDRAM(int b)
|
|
{
|
|
cpu68k_map_set(m68k_read8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
|
|
cpu68k_map_set(m68k_read16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
|
|
cpu68k_map_set(m68k_write8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
|
|
cpu68k_map_set(m68k_write16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
|
|
}
|
|
|
|
static void bank_switch(int b)
|
|
{
|
|
unsigned int rs, bank;
|
|
|
|
bank = b << 20;
|
|
if (bank >= Pico.romsize) {
|
|
elprintf(EL_32X|EL_ANOMALY, "missing bank @ %06x", bank);
|
|
return;
|
|
}
|
|
|
|
// 32X ROM (unbanked, XXX: consider mirroring?)
|
|
rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
|
|
rs -= bank;
|
|
if (rs > 0x100000)
|
|
rs = 0x100000;
|
|
cpu68k_map_set(m68k_read8_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
|
|
cpu68k_map_set(m68k_read16_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
|
|
|
|
elprintf(EL_32X, "bank %06x-%06x -> %06x", 0x900000, 0x900000 + rs - 1, bank);
|
|
}
|
|
|
|
// -----------------------------------------------------------------
|
|
// SH2
|
|
// -----------------------------------------------------------------
|
|
|
|
u32 p32x_sh2_read8(u32 a)
|
|
{
|
|
int pd = 0;
|
|
u32 d = 0;
|
|
|
|
if (a < sizeof(Pico32xMem->sh2_rom_m))
|
|
return Pico32xMem->sh2_rom_m[a ^ 1];
|
|
|
|
if ((a & 0x0ffc0000) == 0x06000000)
|
|
return Pico32xMem->sdram[(a & 0x3ffff) ^ 1];
|
|
|
|
if ((a & 0x0fc00000) == 0x02000000)
|
|
if ((a & 0x003fffff) < Pico.romsize)
|
|
return Pico.rom[(a & 0x3fffff) ^ 1];
|
|
|
|
if ((a & 0x0fffff00) == 0x4000) {
|
|
d = p32x_sh2reg_read16(a);
|
|
pd = P32XF_MSH2POLL;
|
|
goto out_pd;
|
|
}
|
|
|
|
if ((a & 0x0fffff00) == 0x4100) {
|
|
d = p32x_vdp_read16(a);
|
|
pd = P32XF_MSH2VPOLL;
|
|
goto out_pd;
|
|
}
|
|
|
|
if ((a & 0x0fffff00) == 0x4200) {
|
|
d = Pico32xMem->pal[(a & 0x1ff) / 2];
|
|
goto out_16to8;
|
|
}
|
|
|
|
elprintf(EL_UIO, "sh2 unmapped r8 [%08x] %02x @%06x", a, d, ash2_pc());
|
|
return d;
|
|
|
|
out_pd:
|
|
if (p32x_poll_detect(&msh2_poll, a, ash2_pc(), pd))
|
|
ash2_end_run(8);
|
|
|
|
out_16to8:
|
|
if (a & 1)
|
|
d &= 0xff;
|
|
else
|
|
d >>= 8;
|
|
|
|
elprintf(EL_32X, "sh2 r8 [%08x] %02x @%06x", a, d, ash2_pc());
|
|
return d;
|
|
}
|
|
|
|
u32 p32x_sh2_read16(u32 a)
|
|
{
|
|
int pd = 0;
|
|
u32 d = 0;
|
|
|
|
if (a < sizeof(Pico32xMem->sh2_rom_m))
|
|
return *(u16 *)(Pico32xMem->sh2_rom_m + a);
|
|
|
|
if ((a & 0x0ffc0000) == 0x06000000)
|
|
return ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2];
|
|
|
|
if ((a & 0x0fc00000) == 0x02000000)
|
|
if ((a & 0x003fffff) < Pico.romsize)
|
|
return ((u16 *)Pico.rom)[(a & 0x3fffff) / 2];
|
|
|
|
if ((a & 0x0fffff00) == 0x4000) {
|
|
d = p32x_sh2reg_read16(a);
|
|
pd = P32XF_MSH2POLL;
|
|
goto out_pd;
|
|
}
|
|
|
|
if ((a & 0x0fffff00) == 0x4100) {
|
|
d = p32x_vdp_read16(a);
|
|
pd = P32XF_MSH2VPOLL;
|
|
goto out_pd;
|
|
}
|
|
|
|
if ((a & 0x0fffff00) == 0x4200) {
|
|
d = Pico32xMem->pal[(a & 0x1ff) / 2];
|
|
goto out;
|
|
}
|
|
|
|
elprintf(EL_UIO, "sh2 unmapped r16 [%08x] %04x @%06x", a, d, ash2_pc());
|
|
return d;
|
|
|
|
out_pd:
|
|
if (p32x_poll_detect(&msh2_poll, a, ash2_pc(), pd))
|
|
ash2_end_run(8);
|
|
|
|
out:
|
|
elprintf(EL_32X, "sh2 r16 [%08x] %04x @%06x", a, d, ash2_pc());
|
|
return d;
|
|
}
|
|
|
|
u32 p32x_sh2_read32(u32 a)
|
|
{
|
|
if ((a & 0xfffffe00) == 0xfffffe00)
|
|
return sh2_peripheral_read(a);
|
|
|
|
// elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc());
|
|
return (p32x_sh2_read16(a) << 16) | p32x_sh2_read16(a + 2);
|
|
}
|
|
|
|
void p32x_sh2_write8(u32 a, u32 d)
|
|
{
|
|
if ((a & 0x0ffffc00) == 0x4000)
|
|
elprintf(EL_32X, "sh2 w8 [%08x] %02x @%06x", a, d & 0xff, ash2_pc());
|
|
|
|
if ((a & 0x0ffc0000) == 0x06000000) {
|
|
Pico32xMem->sdram[(a & 0x3ffff) ^ 1] = d;
|
|
return;
|
|
}
|
|
|
|
if ((a & 0x0ffe0000) == 0x04000000) {
|
|
u8 *dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
|
|
dram[(a & 0x1ffff) ^ 1] = d;
|
|
return;
|
|
}
|
|
|
|
if ((a & 0x0fffff00) == 0x4100) {
|
|
p32x_vdp_write8(a, d);
|
|
return;
|
|
}
|
|
|
|
if ((a & 0x0fffff00) == 0x4000) {
|
|
p32x_sh2reg_write8(a, d);
|
|
return;
|
|
}
|
|
|
|
elprintf(EL_UIO, "sh2 unmapped w8 [%08x] %02x @%06x", a, d & 0xff, ash2_pc());
|
|
}
|
|
|
|
void p32x_sh2_write16(u32 a, u32 d)
|
|
{
|
|
if ((a & 0x0ffffc00) == 0x4000)
|
|
elprintf(EL_32X, "sh2 w16 [%08x] %04x @%06x", a, d & 0xffff, ash2_pc());
|
|
|
|
if ((a & 0x0ffc0000) == 0x06000000) {
|
|
((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2] = d;
|
|
return;
|
|
}
|
|
|
|
if ((a & 0x0ffe0000) == 0x04000000) {
|
|
Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2] = d;
|
|
return;
|
|
}
|
|
|
|
if ((a & 0x0fffff00) == 0x4100) {
|
|
p32x_vdp_write16(a, d);
|
|
return;
|
|
}
|
|
|
|
if ((a & 0x0ffffe00) == 0x4200) {
|
|
Pico32xMem->pal[(a & 0x1ff) / 2] = d;
|
|
Pico32x.dirty_pal = 1;
|
|
return;
|
|
}
|
|
|
|
if ((a & 0x0fffff00) == 0x4000) {
|
|
p32x_sh2reg_write16(a, d);
|
|
return;
|
|
}
|
|
|
|
elprintf(EL_UIO, "sh2 unmapped w16 [%08x] %04x @%06x", a, d & 0xffff, ash2_pc());
|
|
}
|
|
|
|
void p32x_sh2_write32(u32 a, u32 d)
|
|
{
|
|
if ((a & 0xfffffe00) == 0xfffffe00) {
|
|
sh2_peripheral_write(a, d);
|
|
return;
|
|
}
|
|
|
|
// elprintf(EL_UIO, "sh2 w32 [%08x] %08x @%06x", a, d, ash2_pc());
|
|
p32x_sh2_write16(a, d >> 16);
|
|
p32x_sh2_write16(a + 2, d);
|
|
}
|
|
|
|
#define HWSWAP(x) (((x) << 16) | ((x) >> 16))
|
|
void PicoMemSetup32x(void)
|
|
{
|
|
unsigned short *ps;
|
|
unsigned int *pl;
|
|
unsigned int rs;
|
|
int i;
|
|
|
|
Pico32xMem = calloc(1, sizeof(*Pico32xMem));
|
|
if (Pico32xMem == NULL) {
|
|
elprintf(EL_STATUS, "OOM");
|
|
return;
|
|
}
|
|
|
|
dmac0 = (void *)&Pico32xMem->sh2_peri_regs[0][0x180 / 4];
|
|
|
|
// generate 68k ROM
|
|
ps = (unsigned short *)Pico32xMem->m68k_rom;
|
|
pl = (unsigned int *)Pico32xMem->m68k_rom;
|
|
for (i = 1; i < 0xc0/4; i++)
|
|
pl[i] = HWSWAP(0x880200 + (i - 1) * 6);
|
|
|
|
// fill with nops
|
|
for (i = 0xc0/2; i < 0x100/2; i++)
|
|
ps[i] = 0x4e71;
|
|
|
|
#if 0
|
|
ps[0xc0/2] = 0x46fc;
|
|
ps[0xc2/2] = 0x2700; // move #0x2700,sr
|
|
ps[0xfe/2] = 0x60fe; // jump to self
|
|
#else
|
|
ps[0xfe/2] = 0x4e75; // rts
|
|
#endif
|
|
|
|
// fill remaining mem with ROM
|
|
memcpy(Pico32xMem->m68k_rom + 0x100, Pico.rom + 0x100, sizeof(Pico32xMem->m68k_rom) - 0x100);
|
|
|
|
// 32X ROM
|
|
// TODO: move
|
|
{
|
|
FILE *f = fopen("32X_M_BIOS.BIN", "rb");
|
|
int i;
|
|
if (f == NULL) {
|
|
printf("missing BIOS\n");
|
|
exit(1);
|
|
}
|
|
fread(Pico32xMem->sh2_rom_m, 1, sizeof(Pico32xMem->sh2_rom_m), f);
|
|
fclose(f);
|
|
for (i = 0; i < sizeof(Pico32xMem->sh2_rom_m); i += 2) {
|
|
int t = Pico32xMem->sh2_rom_m[i];
|
|
Pico32xMem->sh2_rom_m[i] = Pico32xMem->sh2_rom_m[i + 1];
|
|
Pico32xMem->sh2_rom_m[i + 1] = t;
|
|
}
|
|
}
|
|
|
|
// cartridge area becomes unmapped
|
|
// XXX: we take the easy way and don't unmap ROM,
|
|
// so that we can avoid handling the RV bit.
|
|
// m68k_map_unmap(0x000000, 0x3fffff);
|
|
|
|
// MD ROM area
|
|
rs = sizeof(Pico32xMem->m68k_rom);
|
|
cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
|
|
cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
|
|
cpu68k_map_set(m68k_write8_map, 0x000000, rs - 1, PicoWrite8_hint, 1); // TODO verify
|
|
cpu68k_map_set(m68k_write16_map, 0x000000, rs - 1, PicoWrite16_hint, 1);
|
|
|
|
// DRAM area
|
|
Pico32xSwapDRAM(1);
|
|
|
|
// 32X ROM (unbanked, XXX: consider mirroring?)
|
|
rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
|
|
if (rs > 0x80000)
|
|
rs = 0x80000;
|
|
cpu68k_map_set(m68k_read8_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
|
|
cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
|
|
|
|
// 32X ROM (banked)
|
|
bank_switch(0);
|
|
}
|
|
|