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379 lines
14 KiB
C
379 lines
14 KiB
C
#ifndef M68K__HEADER
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#define M68K__HEADER
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/* ======================================================================== */
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/* ========================= LICENSING & COPYRIGHT ======================== */
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/* ======================================================================== */
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/*
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* MUSASHI
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* Version 3.31
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*
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* A portable Motorola M680x0 processor emulation engine.
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* Copyright 1998-2007 Karl Stenerud. All rights reserved.
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*
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* This code may be freely used for non-commercial purposes as long as this
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* copyright notice remains unaltered in the source code and any binary files
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* containing this code in compiled form.
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*
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* All other lisencing terms must be negotiated with the author
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* (Karl Stenerud).
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*
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* The latest version of this code can be obtained at:
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* http://kstenerud.cjb.net
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*/
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/* ======================================================================== */
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/* ============================= CONFIGURATION ============================ */
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/* ======================================================================== */
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/* Import the configuration for this build */
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#include "m68kconf.h"
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/* ======================================================================== */
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/* ============================ GENERAL DEFINES =========================== */
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/* ======================================================================== */
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/* There are 7 levels of interrupt to the 68K.
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* A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
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*/
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#define M68K_IRQ_NONE 0
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#define M68K_IRQ_1 1
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#define M68K_IRQ_2 2
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#define M68K_IRQ_3 3
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#define M68K_IRQ_4 4
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#define M68K_IRQ_5 5
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#define M68K_IRQ_6 6
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#define M68K_IRQ_7 7
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/* Special interrupt acknowledge values.
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* Use these as special returns from the interrupt acknowledge callback
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* (specified later in this header).
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*/
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/* Causes an interrupt autovector (0x18 + interrupt level) to be taken.
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* This happens in a real 68K if VPA or AVEC is asserted during an interrupt
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* acknowledge cycle instead of DTACK.
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*/
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#define M68K_INT_ACK_AUTOVECTOR 0xffffffff
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/* Causes the spurious interrupt vector (0x18) to be taken
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* This happens in a real 68K if BERR is asserted during the interrupt
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* acknowledge cycle (i.e. no devices responded to the acknowledge).
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*/
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#define M68K_INT_ACK_SPURIOUS 0xfffffffe
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/* CPU types for use in m68k_set_cpu_type() */
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enum
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{
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M68K_CPU_TYPE_INVALID,
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M68K_CPU_TYPE_68000,
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M68K_CPU_TYPE_68008,
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M68K_CPU_TYPE_68010,
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M68K_CPU_TYPE_68EC020,
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M68K_CPU_TYPE_68020,
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M68K_CPU_TYPE_68030, /* Supported by disassembler ONLY */
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M68K_CPU_TYPE_68040 /* Supported by disassembler ONLY */
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};
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/* Registers used by m68k_get_reg() and m68k_set_reg() */
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typedef enum
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{
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/* Real registers */
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M68K_REG_D0, /* Data registers */
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M68K_REG_D1,
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M68K_REG_D2,
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M68K_REG_D3,
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M68K_REG_D4,
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M68K_REG_D5,
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M68K_REG_D6,
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M68K_REG_D7,
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M68K_REG_A0, /* Address registers */
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M68K_REG_A1,
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M68K_REG_A2,
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M68K_REG_A3,
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M68K_REG_A4,
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M68K_REG_A5,
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M68K_REG_A6,
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M68K_REG_A7,
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M68K_REG_PC, /* Program Counter */
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M68K_REG_SR, /* Status Register */
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M68K_REG_SP, /* The current Stack Pointer (located in A7) */
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M68K_REG_USP, /* User Stack Pointer */
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M68K_REG_ISP, /* Interrupt Stack Pointer */
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M68K_REG_MSP, /* Master Stack Pointer */
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M68K_REG_SFC, /* Source Function Code */
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M68K_REG_DFC, /* Destination Function Code */
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M68K_REG_VBR, /* Vector Base Register */
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M68K_REG_CACR, /* Cache Control Register */
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M68K_REG_CAAR, /* Cache Address Register */
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/* Assumed registers */
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/* These are cheat registers which emulate the 1-longword prefetch
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* present in the 68000 and 68010.
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*/
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M68K_REG_PREF_ADDR, /* Last prefetch address */
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M68K_REG_PREF_DATA, /* Last prefetch data */
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/* Convenience registers */
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M68K_REG_PPC, /* Previous value in the program counter */
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M68K_REG_IR, /* Instruction register */
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M68K_REG_CPU_TYPE /* Type of CPU being run */
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} m68k_register_t;
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/* ======================================================================== */
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/* ====================== FUNCTIONS CALLED BY THE CPU ===================== */
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/* ======================================================================== */
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/* You will have to implement these functions */
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/* read/write functions called by the CPU to access memory.
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* while values used are 32 bits, only the appropriate number
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* of bits are relevant (i.e. in write_memory_8, only the lower 8 bits
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* of value should be written to memory).
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*
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* NOTE: I have separated the immediate and PC-relative memory fetches
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* from the other memory fetches because some systems require
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* differentiation between PROGRAM and DATA fetches (usually
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* for security setups such as encryption).
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* This separation can either be achieved by setting
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* M68K_SEPARATE_READS in m68kconf.h and defining
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* the read functions, or by setting M68K_EMULATE_FC and
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* making a function code callback function.
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* Using the callback offers better emulation coverage
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* because you can also monitor whether the CPU is in SYSTEM or
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* USER mode, but it is also slower.
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*/
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/* Read from anywhere */
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unsigned int m68k_read_memory_8(unsigned int address);
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unsigned int m68k_read_memory_16(unsigned int address);
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unsigned int m68k_read_memory_32(unsigned int address);
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/* Read data immediately following the PC */
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unsigned int m68k_read_immediate_16(unsigned int address);
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unsigned int m68k_read_immediate_32(unsigned int address);
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/* Read data relative to the PC */
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unsigned int m68k_read_pcrelative_8(unsigned int address);
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unsigned int m68k_read_pcrelative_16(unsigned int address);
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unsigned int m68k_read_pcrelative_32(unsigned int address);
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/* Memory access for the disassembler */
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unsigned int m68k_read_disassembler_8 (unsigned int address);
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unsigned int m68k_read_disassembler_16 (unsigned int address);
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unsigned int m68k_read_disassembler_32 (unsigned int address);
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/* Write to anywhere */
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void m68k_write_memory_8(unsigned int address, unsigned int value);
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void m68k_write_memory_16(unsigned int address, unsigned int value);
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void m68k_write_memory_32(unsigned int address, unsigned int value);
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/* Special call to simulate undocumented 68k behavior when move.l with a
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* predecrement destination mode is executed.
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* To simulate real 68k behavior, first write the high word to
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* [address+2], and then write the low word to [address].
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*
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* Enable this functionality with M68K_SIMULATE_PD_WRITES in m68kconf.h.
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*/
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void m68k_write_memory_32_pd(unsigned int address, unsigned int value);
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/* ======================================================================== */
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/* ============================== CALLBACKS =============================== */
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/* ======================================================================== */
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/* These functions allow you to set callbacks to the host when specific events
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* occur. Note that you must enable the corresponding value in m68kconf.h
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* in order for these to do anything useful.
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* Note: I have defined default callbacks which are used if you have enabled
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* the corresponding #define in m68kconf.h but either haven't assigned a
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* callback or have assigned a callback of NULL.
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*/
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/* Set the callback for an interrupt acknowledge.
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* You must enable M68K_EMULATE_INT_ACK in m68kconf.h.
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* The CPU will call the callback with the interrupt level being acknowledged.
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* The host program must return either a vector from 0x02-0xff, or one of the
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* special interrupt acknowledge values specified earlier in this header.
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* If this is not implemented, the CPU will always assume an autovectored
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* interrupt, and will automatically clear the interrupt request when it
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* services the interrupt.
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* Default behavior: return M68K_INT_ACK_AUTOVECTOR.
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*/
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void m68k_set_int_ack_callback(int (*callback)(int int_level));
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/* Set the callback for a breakpoint acknowledge (68010+).
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* You must enable M68K_EMULATE_BKPT_ACK in m68kconf.h.
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* The CPU will call the callback with whatever was in the data field of the
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* BKPT instruction for 68020+, or 0 for 68010.
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* Default behavior: do nothing.
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*/
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void m68k_set_bkpt_ack_callback(void (*callback)(unsigned int data));
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/* Set the callback for the RESET instruction.
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* You must enable M68K_EMULATE_RESET in m68kconf.h.
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* The CPU calls this callback every time it encounters a RESET instruction.
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* Default behavior: do nothing.
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*/
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void m68k_set_reset_instr_callback(void (*callback)(void));
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/* Set the callback for the CMPI.L #v, Dn instruction.
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* You must enable M68K_CMPILD_HAS_CALLBACK in m68kconf.h.
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* The CPU calls this callback every time it encounters a CMPI.L #v, Dn instruction.
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* Default behavior: do nothing.
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*/
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void m68k_set_cmpild_instr_callback(void (*callback)(unsigned int val, int reg));
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/* Set the callback for the RTE instruction.
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* You must enable M68K_RTE_HAS_CALLBACK in m68kconf.h.
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* The CPU calls this callback every time it encounters a RTE instruction.
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* Default behavior: do nothing.
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*/
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void m68k_set_rte_instr_callback(void (*callback)(void));
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/* Set the callback for the TAS instruction.
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* You must enable M68K_TAS_HAS_CALLBACK in m68kconf.h.
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* The CPU calls this callback every time it encounters a TAS instruction.
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* Default behavior: return 1, allow writeback.
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*/
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void m68k_set_tas_instr_callback(int (*callback)(void));
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/* Set the callback for informing of a large PC change.
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* You must enable M68K_MONITOR_PC in m68kconf.h.
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* The CPU calls this callback with the new PC value every time the PC changes
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* by a large value (currently set for changes by longwords).
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* Default behavior: do nothing.
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*/
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void m68k_set_pc_changed_callback(void (*callback)(unsigned int new_pc));
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/* Set the callback for CPU function code changes.
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* You must enable M68K_EMULATE_FC in m68kconf.h.
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* The CPU calls this callback with the function code before every memory
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* access to set the CPU's function code according to what kind of memory
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* access it is (supervisor/user, program/data and such).
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* Default behavior: do nothing.
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*/
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void m68k_set_fc_callback(void (*callback)(unsigned int new_fc));
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/* Set a callback for the instruction cycle of the CPU.
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* You must enable M68K_INSTRUCTION_HOOK in m68kconf.h.
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* The CPU calls this callback just before fetching the opcode in the
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* instruction cycle.
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* Default behavior: do nothing.
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*/
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void m68k_set_instr_hook_callback(void (*callback)(void));
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/* ======================================================================== */
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/* ====================== FUNCTIONS TO ACCESS THE CPU ===================== */
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/* ======================================================================== */
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/* Use this function to set the CPU type you want to emulate.
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* Currently supported types are: M68K_CPU_TYPE_68000, M68K_CPU_TYPE_68008,
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* M68K_CPU_TYPE_68010, M68K_CPU_TYPE_EC020, and M68K_CPU_TYPE_68020.
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*/
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void m68k_set_cpu_type(unsigned int cpu_type);
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/* Do whatever initialisations the core requires. Should be called
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* at least once at init time.
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*/
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void m68k_init(void);
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/* Pulse the RESET pin on the CPU.
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* You *MUST* reset the CPU at least once to initialize the emulation
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* Note: If you didn't call m68k_set_cpu_type() before resetting
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* the CPU for the first time, the CPU will be set to
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* M68K_CPU_TYPE_68000.
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*/
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void m68k_pulse_reset(void);
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/* execute num_cycles worth of instructions. returns number of cycles used */
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int m68k_execute(int num_cycles);
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/* These functions let you read/write/modify the number of cycles left to run
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* while m68k_execute() is running.
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* These are useful if the 68k accesses a memory-mapped port on another device
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* that requires immediate processing by another CPU.
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*/
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int m68k_cycles_run(void); /* Number of cycles run so far */
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int m68k_cycles_remaining(void); /* Number of cycles left */
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void m68k_modify_timeslice(int cycles); /* Modify cycles left */
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void m68k_end_timeslice(void); /* End timeslice now */
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/* Set the IPL0-IPL2 pins on the CPU (IRQ).
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* A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
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* Setting IRQ to 0 will clear an interrupt request.
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*/
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void m68k_set_irq(unsigned int int_level);
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/* Halt the CPU as if you pulsed the HALT pin. */
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void m68k_pulse_halt(void);
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/* Context switching to allow multiple CPUs */
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/* Get the size of the cpu context in bytes */
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unsigned int m68k_context_size(void);
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/* Get a cpu context */
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unsigned int m68k_get_context(void* dst);
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/* set the current cpu context */
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void m68k_set_context(void* dst);
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/* Register the CPU state information */
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void m68k_state_register(const char *type, int index);
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/* Peek at the internals of a CPU context. This can either be a context
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* retrieved using m68k_get_context() or the currently running context.
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* If context is NULL, the currently running CPU context will be used.
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*/
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unsigned int m68k_get_reg(void* context, m68k_register_t reg);
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/* Poke values into the internals of the currently running CPU context */
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void m68k_set_reg(m68k_register_t reg, unsigned int value);
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/* Check if an instruction is valid for the specified CPU type */
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unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type);
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/* Disassemble 1 instruction using the epecified CPU type at pc. Stores
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* disassembly in str_buff and returns the size of the instruction in bytes.
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*/
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unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type);
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/* Same as above but accepts raw opcode data directly rather than fetching
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* via the read/write interfaces.
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*/
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unsigned int m68k_disassemble_raw(char* str_buff, unsigned int pc, const unsigned char* opdata, const unsigned char* argdata, unsigned int cpu_type);
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/* ======================================================================== */
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/* ============================== MAME STUFF ============================== */
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/* ======================================================================== */
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#if M68K_COMPILE_FOR_MAME == OPT_ON
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#include "m68kmame.h"
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#endif /* M68K_COMPILE_FOR_MAME */
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/* ======================================================================== */
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/* ============================== END OF FILE ============================= */
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/* ======================================================================== */
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#endif /* M68K__HEADER */
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