mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-10-27 00:29:39 -04:00
723 lines
17 KiB
ArmAsm
723 lines
17 KiB
ArmAsm
@*
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@* Memory I/O handlers for Sega/Mega CD emulation
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@* (C) notaz, 2007-2009
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@*
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@* This work is licensed under the terms of MAME license.
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@* See COPYING file in the top-level directory.
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@*
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.equiv PCM_STEP_SHIFT, 11
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.text
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.align 2
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.global PicoReadM68k8_io
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.global PicoReadM68k16_io
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.global PicoWriteM68k8_io
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.global PicoWriteM68k16_io
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.global PicoReadS68k8_pr
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.global PicoReadS68k16_pr
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.global PicoWriteS68k8_pr
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.global PicoWriteS68k16_pr
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.global PicoReadM68k8_cell0
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.global PicoReadM68k8_cell1
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.global PicoReadM68k16_cell0
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.global PicoReadM68k16_cell1
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.global PicoWriteM68k8_cell0
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.global PicoWriteM68k8_cell1
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.global PicoWriteM68k16_cell0
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.global PicoWriteM68k16_cell1
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.global PicoReadS68k8_dec0
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.global PicoReadS68k8_dec1
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.global PicoReadS68k16_dec0
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.global PicoReadS68k16_dec1
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.global PicoWriteS68k8_dec_m0b0
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.global PicoWriteS68k8_dec_m1b0
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.global PicoWriteS68k8_dec_m2b0
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.global PicoWriteS68k8_dec_m0b1
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.global PicoWriteS68k8_dec_m1b1
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.global PicoWriteS68k8_dec_m2b1
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.global PicoWriteS68k16_dec_m0b0
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.global PicoWriteS68k16_dec_m1b0
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.global PicoWriteS68k16_dec_m2b0
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.global PicoWriteS68k16_dec_m0b1
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.global PicoWriteS68k16_dec_m1b1
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.global PicoWriteS68k16_dec_m2b1
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@ externs, just for reference
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.extern Pico
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.extern Read_CDC_Host
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.extern m68k_reg_write8
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.extern s68k_reg_read16
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.extern s68k_reg_write8
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.extern s68k_poll_detect
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.extern gfx_cd_read
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.extern gfx_cd_write16
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.extern PicoCpuCS68k
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.extern PicoRead8_io
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.extern PicoRead16_io
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.extern PicoWrite8_io
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.extern PicoWrite16_io
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.extern m68k_comm_check
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@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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@ utilities
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@ r0=addr[in,out], r1,r2=tmp
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.macro cell_map
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ands r1, r0, #0x01c000
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ldrne pc, [pc, r1, lsr #12]
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beq 0f @ most common?
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.long 0f
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.long 0f
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.long 0f
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.long 0f
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.long 1f
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.long 1f
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.long 2f
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.long 3f
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1: @ x16 cells
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and r1, r0, #0x7e00 @ col
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and r2, r0, #0x01fc @ row
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orr r2, r2, #0x0400
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orr r1, r2, r1, ror #13
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b 9f
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2: @ x8 cells
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and r1, r0, #0x3f00 @ col
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and r2, r0, #0x00fc @ row
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orr r2, r2, #0x0600
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orr r1, r2, r1, ror #12
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b 9f
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3: @ x4 cells
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and r1, r0, #0x1f80 @ col
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and r2, r0, #0x007c @ row
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orr r1, r2, r1, ror #11
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and r2, r0,#0x1e000
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orr r1, r1, r2, lsr #6
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b 9f
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0: @ x32 cells
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and r1, r0, #0xfc00 @ col
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and r2, r0, #0x03fc @ row
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orr r1, r2, r1, ror #14
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9:
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and r0, r0, #3
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orr r0, r0, r1, ror #26 @ rol 4+2
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.endm
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@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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m_read_null:
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mov r0, #0
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bx lr
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PicoReadM68k8_cell0: @ 0x220000 - 0x23ffff, cell arranged
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mov r3, #0x0c0000
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b 0f
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PicoReadM68k8_cell1: @ 0x220000 - 0x23ffff, cell arranged
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mov r3, #0x0e0000
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0:
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cell_map
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ldr r1, =(Pico+0x22200)
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add r0, r0, r3
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ldr r1, [r1]
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eor r0, r0, #1
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ldrb r0, [r1, r0]
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bx lr
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PicoReadM68k8_io:
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and r1, r0, #0xff00
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cmp r1, #0x2000 @ a120xx?
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bne PicoRead8_io
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ldr r1, =(Pico+0x22200)
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and r0, r0, #0x3f
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ldr r1, [r1] @ Pico.mcd (used everywhere)
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cmp r0, #0x0e
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ldrlt pc, [pc, r0, lsl #2]
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b m_m68k_read8_hi
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.long m_m68k_read8_r00
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.long m_m68k_read8_r01
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.long m_m68k_read8_r02
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.long m_m68k_read8_r03
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.long m_m68k_read8_r04
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.long m_read_null @ unused bits
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.long m_m68k_read8_r06
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.long m_m68k_read8_r07
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.long m_m68k_read8_r08
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.long m_m68k_read8_r09
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.long m_read_null @ reserved
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.long m_read_null
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.long m_m68k_read8_r0c
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.long m_m68k_read8_r0d
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m_m68k_read8_r00:
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add r1, r1, #0x110000
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ldr r0, [r1, #0x30]
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and r0, r0, #0x04000000 @ we need irq2 mask state
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mov r0, r0, lsr #19
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bx lr
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m_m68k_read8_r01:
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add r1, r1, #0x110000
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add r1, r1, #0x002200
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ldrb r0, [r1, #2] @ Pico_mcd->m.busreq
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bx lr
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m_m68k_read8_r02:
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add r1, r1, #0x110000
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ldrb r0, [r1, #2]
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bx lr
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m_m68k_read8_r03: @ FIXME: sync with C
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add r2, r1, #0x110000
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ldrb r1, [r2, #3]
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add r2, r2, #0x002200
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ldr r2, [r2, #4]
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and r1, r1, #0xc7
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tst r2, #2 @ DMNA pending?
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bicne r1, r1, #1
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orrne r1, r1, #2
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b m68k_comm_check
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m_m68k_read8_r04:
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add r1, r1, #0x110000
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ldrb r0, [r1, #4]
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bx lr
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m_m68k_read8_r06:
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ldrb r0, [r1, #0x73] @ IRQ vector
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bx lr
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m_m68k_read8_r07:
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ldrb r0, [r1, #0x72]
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bx lr
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m_m68k_read8_r08:
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mov r0, #0
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bl Read_CDC_Host @ TODO: make it local
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mov r0, r0, lsr #8
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bx lr
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m_m68k_read8_r09:
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mov r0, #0
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b Read_CDC_Host
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m_m68k_read8_r0c:
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add r1, r1, #0x110000
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add r1, r1, #0x002200
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ldr r0, [r1, #0x14] @ Pico_mcd->m.timer_stopwatch
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mov r0, r0, lsr #24
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bx lr
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m_m68k_read8_r0d:
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add r1, r1, #0x110000
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add r1, r1, #0x002200
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ldr r0, [r1, #0x14]
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mov r0, r0, lsr #16
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bx lr
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m_m68k_read8_hi:
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cmp r0, #0x30
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movge r0, #0
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bxeq lr
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add r1, r1, #0x110000
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ldrb r1, [r1, r0]
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b m68k_comm_check
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@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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PicoReadM68k16_cell0: @ 0x220000 - 0x23ffff, cell arranged
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mov r3, #0x0c0000
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b 0f
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PicoReadM68k16_cell1: @ 0x220000 - 0x23ffff, cell arranged
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mov r3, #0x0e0000
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0:
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cell_map
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ldr r1, =(Pico+0x22200)
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add r0, r0, r3
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ldr r1, [r1]
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bic r0, r0, #1
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ldrh r0, [r1, r0]
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bx lr
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PicoReadM68k16_io:
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and r1, r0, #0xff00
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cmp r1, #0x2000 @ a120xx
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bne PicoRead16_io
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m_m68k_read16_m68k_regs:
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ldr r1, =(Pico+0x22200)
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and r0, r0, #0x3e
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ldr r1, [r1] @ Pico.mcd (used everywhere)
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cmp r0, #0x0e
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ldrlt pc, [pc, r0, lsl #1]
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b m_m68k_read16_hi
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.long m_m68k_read16_r00
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.long m_m68k_read16_r02
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.long m_m68k_read16_r04
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.long m_m68k_read16_r06
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.long m_m68k_read16_r08
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.long m_read_null @ reserved
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.long m_m68k_read16_r0c
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m_m68k_read16_r00:
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add r1, r1, #0x110000
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ldr r0, [r1, #0x30]
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add r1, r1, #0x002200
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ldrb r1, [r1, #2] @ Pico_mcd->m.busreq
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and r0, r0, #0x04000000 @ we need irq2 mask state
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orr r0, r1, r0, lsr #11
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bx lr
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m_m68k_read16_r02: @ FIXME: out of sync from C
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add r3, r1, #0x110000
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ldrb r1, [r3, #2]
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ldrb r2, [r3, #3]
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add r3, r3, #0x002200
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ldr r3, [r3, #4]
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and r2, r2, #0xc7
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orr r1, r2, r1, lsl #8
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tst r3, #2 @ DMNA pending?
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bicne r1, r1, #1
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orrne r1, r1, #2
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b m68k_comm_check
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m_m68k_read16_r04:
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add r1, r1, #0x110000
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ldrb r0, [r1, #4]
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mov r0, r0, lsl #8
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bx lr
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m_m68k_read16_r06:
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ldrh r0, [r1, #0x72] @ IRQ vector
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bx lr
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m_m68k_read16_r08:
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mov r0, #0
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b Read_CDC_Host
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m_m68k_read16_r0c:
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add r1, r1, #0x110000
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add r1, r1, #0x002200
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ldr r0, [r1, #0x14]
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mov r0, r0, lsr #16
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bx lr
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m_m68k_read16_hi:
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cmp r0, #0x30
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addlt r1, r1, #0x110000
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ldrlth r1, [r1, r0]
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movge r0, #0
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bxge lr
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mov r2, r1, lsr #8
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and r1, r1, #0xff
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orr r1, r2, r1, lsl #8
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b m68k_comm_check
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@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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PicoWriteM68k8_cell0: @ 0x220000 - 0x23ffff, cell arranged
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mov r12,#0x0c0000
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b 0f
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PicoWriteM68k8_cell1: @ 0x220000 - 0x23ffff, cell arranged
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mov r12,#0x0e0000
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0:
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mov r3, r1
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cell_map
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ldr r2, =(Pico+0x22200)
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add r0, r0, r12
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ldr r2, [r2]
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eor r0, r0, #1
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strb r3, [r2, r0]
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bx lr
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PicoWriteM68k8_io:
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and r2, r0, #0xff00
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cmp r2, #0x2000 @ a120xx?
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beq m68k_reg_write8
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b PicoWrite8_io
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@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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PicoWriteM68k16_cell0: @ 0x220000 - 0x23ffff, cell arranged
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mov r12, #0x0c0000
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b 0f
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PicoWriteM68k16_cell1: @ 0x220000 - 0x23ffff, cell arranged
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mov r12, #0x0e0000
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0:
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mov r3, r1
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cell_map
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ldr r1, =(Pico+0x22200)
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add r0, r0, r12
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ldr r1, [r1]
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bic r0, r0, #1
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strh r3, [r1, r0]
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bx lr
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PicoWriteM68k16_io:
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and r2, r0, #0xff00
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cmp r2, #0x2000 @ a120xx?
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bne PicoWrite16_io
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m_m68k_write16_regs:
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and r0, r0, #0x3e
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cmp r0, #0x0e
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beq m_m68k_write16_regs_spec
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and r3, r1, #0xff
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add r2, r0, #1
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stmfd sp!,{r2,r3,lr}
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mov r1, r1, lsr #8
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bl m68k_reg_write8
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ldmfd sp!,{r0,r1,lr}
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b m68k_reg_write8
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m_m68k_write16_regs_spec: @ special case
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mov r1, r1, lsr #8
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b m68k_reg_write8
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@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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@ Sub 68k
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@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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PicoReadS68k8_dec0: @ 0x080000 - 0x0bffff
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mov r3, #0x080000 @ + ^ / 2
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b 0f
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PicoReadS68k8_dec1:
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mov r3, #0x0a0000 @ + ^ / 2
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0:
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ldr r2, =(Pico+0x22200)
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eor r0, r0, #2
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ldr r2, [r2]
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movs r0, r0, lsr #1 @ +4-6 <<16
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add r2, r2, r3 @ map to our address
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ldrb r0, [r2, r0]
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movcc r0, r0, lsr #4
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andcs r0, r0, #0xf
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bx lr
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PicoReadS68k8_pr:
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and r2, r0, #0xfe00
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cmp r2, #0x8000
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bne m_s68k_read8_pcm
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m_s68k_read8_regs:
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bic r0, r0, #0xff0000
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bic r0, r0, #0x008000
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sub r2, r0, #0x0e
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cmp r2, #(0x30-0x0e)
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blo m_s68k_read8_comm
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sub r2, r0, #0x58
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cmp r2, #0x10
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ldrlo r2, =gfx_cd_read
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ldrhs r2, =s68k_reg_read16
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stmfd sp!,{r0,lr}
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bic r0, r0, #1
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mov lr, pc
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bx r2
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ldmfd sp!,{r1,lr}
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tst r1, #1
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moveq r0, r0, lsr #8
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and r0, r0, #0xff
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bx lr
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m_s68k_read8_comm:
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ldr r1, =(Pico+0x22200)
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ldr r1, [r1]
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add r1, r1, #0x110000
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ldrb r1, [r1, r0]
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b s68k_poll_detect
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m_s68k_read8_pcm:
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tst r0, #0x8000
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bne m_read_null
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@ must not trash r3 and r12
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ldr r1, =(Pico+0x22200)
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bic r0, r0, #0xff0000
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@ bic r0, r0, #0x008000
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ldr r1, [r1]
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mov r2, #0x110000
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orr r2, r2, #0x002200
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cmp r0, #0x2000
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bge m_s68k_read8_pcm_ram
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cmp r0, #0x20
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movlt r0, #0
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bxlt lr
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orr r2, r2, #(0x48+8) @ pcm.ch + addr_offset
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add r1, r1, r2
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and r2, r0, #0x1c
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ldr r1, [r1, r2, lsl #2]
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tst r0, #2
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moveq r0, r1, lsr #PCM_STEP_SHIFT
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movne r0, r1, lsr #(PCM_STEP_SHIFT+8)
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and r0, r0, #0xff
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bx lr
|
|
|
|
m_s68k_read8_pcm_ram:
|
|
orr r2, r2, #0x40
|
|
ldr r2, [r1, r2]
|
|
add r1, r1, #0x100000 @ pcm_ram
|
|
and r2, r2, #0x0f000000 @ bank
|
|
add r1, r1, r2, lsr #12
|
|
bic r0, r0, #0x00e000
|
|
mov r0, r0, lsr #1
|
|
ldrb r0, [r1, r0]
|
|
bx lr
|
|
|
|
|
|
@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
|
|
|
|
|
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PicoReadS68k16_dec0: @ 0x080000 - 0x0bffff
|
|
mov r3, #0x080000 @ + ^ / 2
|
|
b 0f
|
|
|
|
PicoReadS68k16_dec1:
|
|
mov r3, #0x0a0000 @ + ^ / 2
|
|
0:
|
|
ldr r2, =(Pico+0x22200)
|
|
eor r0, r0, #2
|
|
ldr r2, [r2]
|
|
mov r0, r0, lsr #1 @ +4-6 <<16
|
|
add r2, r2, r3 @ map to our address
|
|
ldrb r0, [r2, r0]
|
|
orr r0, r0, r0, lsl #4
|
|
bic r0, r0, #0xf0
|
|
bx lr
|
|
|
|
|
|
PicoReadS68k16_pr:
|
|
and r2, r0, #0xfe00
|
|
cmp r2, #0x8000
|
|
@ pcm is on 8-bit bus, would this be same as byte access?
|
|
bne m_s68k_read8_pcm
|
|
|
|
m_s68k_read16_regs:
|
|
bic r0, r0, #0xff0000
|
|
bic r0, r0, #0x008000
|
|
bic r0, r0, #0x000001
|
|
sub r2, r0, #0x58
|
|
cmp r2, #0x10
|
|
blo gfx_cd_read
|
|
cmp r0, #8
|
|
bne s68k_reg_read16
|
|
mov r0, #1
|
|
b Read_CDC_Host
|
|
|
|
|
|
@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
|
|
|
|
|
|
.macro m_s68k_write8_2M_decode
|
|
ldr r2, =(Pico+0x22200)
|
|
eor r0, r0, #2
|
|
ldr r2, [r2] @ Pico.rom
|
|
movs r0, r0, lsr #1 @ +4-6 <<16
|
|
add r2, r2, r3 @ map to our address
|
|
.endm
|
|
|
|
PicoWriteS68k8_dec_m2b0: @ overwrite
|
|
ands r1, r1, #0x0f
|
|
bxeq lr
|
|
|
|
PicoWriteS68k8_dec_m0b0:
|
|
mov r3, #0x080000
|
|
b 0f
|
|
|
|
PicoWriteS68k8_dec_m2b1: @ overwrite
|
|
ands r1, r1, #0x0f
|
|
bxeq lr
|
|
|
|
PicoWriteS68k8_dec_m0b1:
|
|
mov r3, #0x0a0000
|
|
0:
|
|
m_s68k_write8_2M_decode
|
|
ldrb r0, [r2, r0]!
|
|
and r1, r1, #0x0f
|
|
movcc r1, r1, lsl #4
|
|
andcc r3, r0, #0x0f
|
|
andcs r3, r0, #0xf0
|
|
orr r3, r3, r1
|
|
strneb r3, [r2]
|
|
bx lr
|
|
|
|
PicoWriteS68k8_dec_m1b0: @ underwrite
|
|
mov r3, #0x080000
|
|
b 0f
|
|
|
|
PicoWriteS68k8_dec_m1b1:
|
|
mov r3, #0x0a0000
|
|
0:
|
|
ands r1, r1, #0x0f
|
|
bxeq lr
|
|
m_s68k_write8_2M_decode
|
|
ldrb r0, [r2, r0]!
|
|
movcc r1, r1, lsl #4
|
|
andcc r3, r0, #0x0f
|
|
andcs r3, r0, #0xf0
|
|
teq r3, r0
|
|
bxne lr
|
|
orr r3, r3, r1
|
|
strneb r3, [r2]
|
|
bx lr
|
|
|
|
|
|
PicoWriteS68k8_pr:
|
|
and r2, r0, #0xfe00
|
|
cmp r2, #0x8000
|
|
bne m_s68k_write8_pcm
|
|
|
|
m_s68k_write8_regs:
|
|
bic r0, r0, #0xff0000
|
|
bic r0, r0, #0x008000
|
|
tst r0, #0x7e00
|
|
movne r0, #0
|
|
bxne lr
|
|
sub r2, r0, #0x58
|
|
cmp r2, #0x10
|
|
bhs s68k_reg_write8
|
|
bic r0, r0, #1
|
|
orr r1, r1, r1, lsl #8
|
|
b gfx_cd_write16
|
|
|
|
|
|
m_s68k_write8_pcm:
|
|
tst r0, #0x8000
|
|
bxne lr
|
|
bic r0, r0, #0xff0000
|
|
cmp r0, #0x12
|
|
movlt r0, r0, lsr #1
|
|
blt pcm_write
|
|
|
|
cmp r0, #0x2000
|
|
bxlt lr
|
|
|
|
m_s68k_write8_pcm_ram:
|
|
ldr r3, =(Pico+0x22200)
|
|
bic r0, r0, #0x00e000
|
|
ldr r3, [r3]
|
|
mov r0, r0, lsr #1
|
|
add r2, r3, #0x110000
|
|
add r2, r2, #0x002200
|
|
add r2, r2, #0x000040
|
|
ldr r2, [r2]
|
|
add r3, r3, #0x100000 @ pcm_ram
|
|
and r2, r2, #0x0f000000 @ bank
|
|
add r3, r3, r2, lsr #12
|
|
strb r1, [r3, r0]
|
|
bx lr
|
|
|
|
|
|
@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
|
|
|
|
|
|
.macro m_s68k_write16_2M_decode
|
|
ldr r2, =(Pico+0x22200)
|
|
eor r0, r0, #2
|
|
ldr r2, [r2]
|
|
mov r0, r0, lsr #1 @ +4-6 <<16
|
|
add r2, r2, r3 @ map to our address
|
|
.endm
|
|
|
|
PicoWriteS68k16_dec_m0b0:
|
|
mov r3, #0x080000
|
|
b 0f
|
|
|
|
PicoWriteS68k16_dec_m0b1:
|
|
mov r3, #0x0a0000
|
|
0:
|
|
m_s68k_write16_2M_decode
|
|
bic r1, r1, #0xf0
|
|
orr r1, r1, r1, lsr #4
|
|
strb r1, [r2, r0]
|
|
bx lr
|
|
|
|
PicoWriteS68k16_dec_m1b0: @ underwrite
|
|
mov r3, #0x080000
|
|
b 0f
|
|
|
|
PicoWriteS68k16_dec_m1b1:
|
|
mov r3, #0x0a0000
|
|
0:
|
|
bics r1, r1, #0xf000
|
|
bicnes r1, r1, #0x00f0
|
|
bxeq lr
|
|
orr r1, r1, r1, lsr #4
|
|
m_s68k_write16_2M_decode
|
|
ldrb r0, [r2, r0]!
|
|
and r3, r1, #0x0f
|
|
and r1, r1, #0xf0
|
|
tst r0, #0x0f
|
|
orreq r0, r0, r3
|
|
tst r0, #0xf0
|
|
orreq r0, r0, r1
|
|
strb r0, [r2]
|
|
bx lr
|
|
|
|
PicoWriteS68k16_dec_m2b0: @ overwrite
|
|
mov r3, #0x080000
|
|
b 0f
|
|
|
|
PicoWriteS68k16_dec_m2b1:
|
|
mov r3, #0x0a0000
|
|
0:
|
|
bics r1, r1, #0xf000
|
|
bicnes r1, r1, #0x00f0
|
|
bxeq lr
|
|
orr r1, r1, r1, lsr #4
|
|
m_s68k_write16_2M_decode
|
|
ldrb r0, [r2, r0]!
|
|
ands r3, r1, #0x0f
|
|
andne r0, r0, #0xf0
|
|
orrne r0, r0, r3
|
|
ands r1, r1, #0xf0
|
|
andne r0, r0, #0x0f
|
|
orrne r0, r0, r1
|
|
strb r0, [r2]
|
|
bx lr
|
|
|
|
|
|
PicoWriteS68k16_pr:
|
|
and r2, r0, #0xfe00
|
|
cmp r2, #0x8000
|
|
bne m_s68k_write8_pcm
|
|
|
|
m_s68k_write16_regs:
|
|
bic r0, r0, #0xff0000
|
|
bic r0, r0, #0x008000
|
|
bic r0, r0, #1
|
|
tst r0, #0x7e00
|
|
movne r0, #0
|
|
bxne lr
|
|
cmp r0, #0x0e
|
|
beq m_s68k_write16_regs_spec
|
|
sub r2, r0, #0x58
|
|
cmp r2, #0x10
|
|
blo gfx_cd_write16
|
|
and r3, r1, #0xff
|
|
add r2, r0, #1
|
|
stmfd sp!,{r2,r3,lr}
|
|
mov r1, r1, lsr #8
|
|
bl s68k_reg_write8
|
|
ldmfd sp!,{r0,r1,lr}
|
|
b s68k_reg_write8
|
|
|
|
m_s68k_write16_regs_spec: @ special case
|
|
ldr r2, =(Pico+0x22200)
|
|
mov r0, #0x110000
|
|
ldr r2, [r2]
|
|
add r0, r0, #0x00000f
|
|
strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0xf] = d;
|
|
bx lr
|
|
|
|
.pool
|
|
|
|
@ vim:filetype=armasm
|