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25 lines
714 B
ArmAsm
25 lines
714 B
ArmAsm
.text
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.arm
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.balign 4
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.func ctr_clear_cache_kernel
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ctr_clear_cache_kernel:
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cpsid aif
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mov r0, #0
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mcr p15, 0, r0, c7, c10, 0 @ Clean entire data cache
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mcr p15, 0, r0, c7, c10, 5 @ Data Memory Barrier
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mcr p15, 0, r0, c7, c5, 0 @ Invalidate entire instruction cache / Flush BTB
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mcr p15, 0, r0, c7, c10, 4 @ Data Sync Barrier
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bx lr
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.endfunc
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@@ Clear the entire data cache / invalidate the instruction cache. Uses
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@@ Rosalina svcCustomBackdoor to avoid svcBackdoor stack corruption
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@@ during interrupts.
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.global ctr_clear_cache
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.func ctr_clear_cache
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ctr_clear_cache:
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ldr r0, =ctr_clear_cache_kernel
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svc 0x80 @ svcCustomBackdoor
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bx lr
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.endfunc
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