mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
cff531af94
- PicoDrive was originally released by fDave with simple
"free for non-commercial use / For commercial use, separate licencing
terms must be obtained" license and I kept it in my releases.
- in 2011, fDave re-released his code (same that I used as base
many years ago) dual licensed with GPLv2 and MAME licenses:
https://code.google.com/p/cyclone68000/
Based on the above I now proclaim that the whole source code is licensed
under the MAME license as more elaborate form of "for non-commercial use".
If that raises any doubt, I announce that all my modifications (which
is the vast majority of code by now) is licensed under the MAME license,
as it reads in COPYING file in this commit.
This does not affect ym2612.c/sn76496.c that were MAME licensed already
from the beginning.
244 lines
6.3 KiB
C
244 lines
6.3 KiB
C
/*
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* PicoDrive
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* (C) notaz, 2007
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*
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* This work is licensed under the terms of MAME license.
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* See COPYING file in the top-level directory.
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*/
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#include "../pico_int.h"
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#include "../sound/ym2612.h"
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extern unsigned char formatted_bram[4*0x10];
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extern unsigned int s68k_poll_adclk;
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void (*PicoMCDopenTray)(void) = NULL;
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void (*PicoMCDcloseTray)(void) = NULL;
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PICO_INTERNAL void PicoInitMCD(void)
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{
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SekInitS68k();
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Init_CD_Driver();
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}
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PICO_INTERNAL void PicoExitMCD(void)
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{
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End_CD_Driver();
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}
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PICO_INTERNAL void PicoPowerMCD(void)
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{
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int fmt_size = sizeof(formatted_bram);
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memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
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memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
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memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
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memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
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memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size);
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}
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PICO_INTERNAL int PicoResetMCD(void)
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{
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memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
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memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
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memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
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*(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6)
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Pico_mcd->m.state_flags |= 1; // s68k reset pending
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Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset
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Reset_CD();
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LC89510_Reset();
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gfx_cd_reset();
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#ifdef _ASM_CD_MEMORY_C
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//PicoMemResetCDdecode(1); // don't have to call this in 2M mode
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#endif
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// use SRam.data for RAM cart
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if (PicoOpt & POPT_EN_MCD_RAMCART) {
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if (SRam.data == NULL)
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SRam.data = calloc(1, 0x12000);
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}
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else if (SRam.data != NULL) {
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free(SRam.data);
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SRam.data = NULL;
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}
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SRam.start = SRam.end = 0; // unused
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return 0;
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}
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static __inline void SekRunM68k(int cyc)
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{
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int cyc_do;
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pprof_start(m68k);
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SekCycleAim+=cyc;
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if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;
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#if defined(EMU_CORE_DEBUG)
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SekCycleCnt+=CM_compareRun(cyc_do, 0);
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#elif defined(EMU_C68K)
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PicoCpuCM68k.cycles=cyc_do;
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CycloneRun(&PicoCpuCM68k);
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SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;
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#elif defined(EMU_M68K)
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m68k_set_context(&PicoCpuMM68k);
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SekCycleCnt+=m68k_execute(cyc_do);
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#elif defined(EMU_F68K)
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g_m68kcontext=&PicoCpuFM68k;
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SekCycleCnt+=fm68k_emulate(cyc_do, 0, 0);
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#endif
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pprof_end(m68k);
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}
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static __inline void SekRunS68k(int cyc)
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{
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int cyc_do;
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SekCycleAimS68k+=cyc;
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if ((cyc_do=SekCycleAimS68k-SekCycleCntS68k) <= 0) return;
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#if defined(EMU_CORE_DEBUG)
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SekCycleCntS68k+=CM_compareRun(cyc_do, 1);
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#elif defined(EMU_C68K)
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PicoCpuCS68k.cycles=cyc_do;
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CycloneRun(&PicoCpuCS68k);
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SekCycleCntS68k+=cyc_do-PicoCpuCS68k.cycles;
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#elif defined(EMU_M68K)
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m68k_set_context(&PicoCpuMS68k);
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SekCycleCntS68k+=m68k_execute(cyc_do);
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#elif defined(EMU_F68K)
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g_m68kcontext=&PicoCpuFS68k;
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SekCycleCntS68k+=fm68k_emulate(cyc_do, 0, 0);
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#endif
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}
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#define PS_STEP_M68K ((488<<16)/20) // ~24
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//#define PS_STEP_S68K 13
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#if defined(_ASM_CD_PICO_C)
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extern void SekRunPS(int cyc_m68k, int cyc_s68k);
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#elif defined(EMU_F68K)
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static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
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{
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SekCycleAim+=cyc_m68k;
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SekCycleAimS68k+=cyc_s68k;
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fm68k_emulate(0, 1, 0);
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}
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#else
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static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
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{
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int cycn, cycn_s68k, cyc_do;
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SekCycleAim+=cyc_m68k;
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SekCycleAimS68k+=cyc_s68k;
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// fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k,
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// SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline);
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/* loop 488 downto 0 in steps of PS_STEP */
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for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K)
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{
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cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16;
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if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) {
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#if defined(EMU_C68K)
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PicoCpuCM68k.cycles = cyc_do;
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CycloneRun(&PicoCpuCM68k);
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SekCycleCnt += cyc_do - PicoCpuCM68k.cycles;
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#elif defined(EMU_M68K)
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m68k_set_context(&PicoCpuMM68k);
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SekCycleCnt += m68k_execute(cyc_do);
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#elif defined(EMU_F68K)
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g_m68kcontext = &PicoCpuFM68k;
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SekCycleCnt += fm68k_emulate(cyc_do, 0, 0);
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#endif
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}
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if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) {
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#if defined(EMU_C68K)
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PicoCpuCS68k.cycles = cyc_do;
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CycloneRun(&PicoCpuCS68k);
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SekCycleCntS68k += cyc_do - PicoCpuCS68k.cycles;
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#elif defined(EMU_M68K)
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m68k_set_context(&PicoCpuMS68k);
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SekCycleCntS68k += m68k_execute(cyc_do);
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#elif defined(EMU_F68K)
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g_m68kcontext = &PicoCpuFS68k;
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SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0);
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#endif
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}
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}
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}
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#endif
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static __inline void check_cd_dma(void)
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{
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int ddx;
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if (!(Pico_mcd->scd.Status_CDC & 0x08)) return;
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ddx = Pico_mcd->s68k_regs[4] & 7;
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if (ddx < 2) return; // invalid
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if (ddx < 4) {
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Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port
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return;
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}
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if (ddx == 6) return; // invalid
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Update_CDC_TRansfer(ddx); // now go and do the actual transfer
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}
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static __inline void update_chips(void)
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{
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int counter_timer, int3_set;
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int counter75hz_lim = Pico.m.pal ? 2080 : 2096;
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// 75Hz CDC update
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if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) {
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Pico_mcd->m.counter75hz -= counter75hz_lim;
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Check_CD_Command();
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}
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// update timers
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counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708;
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Pico_mcd->m.timer_stopwatch += counter_timer;
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if ((int3_set = Pico_mcd->s68k_regs[0x31])) {
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Pico_mcd->m.timer_int3 -= counter_timer;
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if (Pico_mcd->m.timer_int3 < 0) {
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if (Pico_mcd->s68k_regs[0x33] & (1<<3)) {
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elprintf(EL_INTS, "s68k: timer irq 3");
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SekInterruptS68k(3);
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Pico_mcd->m.timer_int3 += int3_set << 16;
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}
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// is this really what happens if irq3 is masked out?
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Pico_mcd->m.timer_int3 &= 0xffffff;
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}
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}
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// update gfx chip
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if (Pico_mcd->rot_comp.Reg_58 & 0x8000)
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gfx_cd_update();
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}
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#define PICO_CD
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#define CPUS_RUN(m68k_cycles,s68k_cycles) \
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{ \
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if ((PicoOpt&POPT_EN_MCD_PSYNC) && (Pico_mcd->m.busreq&3) == 1) { \
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SekRunPS(m68k_cycles, s68k_cycles); /* "better/perfect sync" */ \
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} else { \
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SekRunM68k(m68k_cycles); \
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if ((Pico_mcd->m.busreq&3) == 1) /* no busreq/no reset */ \
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SekRunS68k(s68k_cycles); \
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} \
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}
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#include "../pico_cmn.c"
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PICO_INTERNAL void PicoFrameMCD(void)
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{
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if (!(PicoOpt&POPT_ALT_RENDERER))
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PicoFrameStart();
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PicoFrameHints();
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}
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