mirror of
https://github.com/RaySollium99/picodrive.git
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390 lines
9 KiB
C
390 lines
9 KiB
C
// This is part of Pico Library
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// (c) Copyright 2004 Dave, All rights reserved.
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// (c) Copyright 2006 notaz, All rights reserved.
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// Free for non-commercial use.
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// For commercial use, separate licencing terms must be obtained.
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#include <string.h>
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#include "sound.h"
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#include "ym2612.h"
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#include "sn76496.h"
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#ifndef __GNUC__
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#pragma warning (disable:4244)
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#endif
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#if defined(_USE_MZ80)
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#include "../../cpu/mz80/mz80.h"
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#elif defined(_USE_DRZ80)
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#include "../../cpu/DrZ80/drz80.h"
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#endif
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#include "../PicoInt.h"
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//int z80CycleAim = 0;
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// dac
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short *dac_out;
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unsigned short dac_info[312]; // pppppppp ppppllll, p - pos in buff, l - length to write for this sample
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// for Pico
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int PsndRate=0;
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int PsndLen=0; // number of mono samples, multiply by 2 for stereo
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short *PsndOut=NULL; // PCM data buffer
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// from ym2612.c
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extern int *ym2612_dacen;
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extern INT32 *ym2612_dacout;
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void YM2612TimerHandler(int c,int cnt);
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// sn76496
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extern int *sn76496_regs;
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static void dac_recalculate()
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{
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int i, dac_cnt, pos, len, lines = Pico.m.pal ? 312 : 262, mid = Pico.m.pal ? 68 : 93;
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if(PsndLen <= lines) {
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// shrinking algo
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dac_cnt = 0;//lines - PsndLen;
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len=1; pos=0;
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dac_info[225] = 1;
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for(i=226; i != 225; i++) {
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if (i >= lines) i = 0;
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len = 0;
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if(dac_cnt < 0) {
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len=1;
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pos++;
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dac_cnt += lines;
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}
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dac_cnt -= PsndLen;
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dac_info[i] = (pos<<4)|len;
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}
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} else {
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// stretching
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dac_cnt = PsndLen/2;
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pos=0;
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for(i = 225; i != 224; i++) {
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if (i >= lines) i = 0;
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len=0;
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while(dac_cnt >= 0) {
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dac_cnt -= lines;
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len++;
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}
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if (i == mid) // midpoint
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while(pos+len < PsndLen/2) {
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dac_cnt -= lines;
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len++;
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}
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dac_cnt += PsndLen;
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dac_info[i] = (pos<<4)|len;
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pos+=len;
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}
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// last sample
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for(len = 0, i = pos; i < PsndLen; i++) len++;
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dac_info[224] = (pos<<4)|len;
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}
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// dprintf("rate is %i, len %i", PsndRate, PsndLen);
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// for(i=0; i < lines; i++)
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// dprintf("%03i : %03i : %i", i, dac_info[i]>>4, dac_info[i]&0xf);
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//exit(8);
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}
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void sound_reset()
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{
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extern int z80stopCycle;
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void *ym2612_regs;
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// init even if we are not going to use them, just in case we ever enable it
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YM2612Init(Pico.m.pal ? OSC_PAL/7 : OSC_NTSC/7, PsndRate);
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// also clear the internal registers+addr line
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ym2612_regs = YM2612GetRegs();
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memset(ym2612_regs, 0, 0x200+4);
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SN76496_init(Pico.m.pal ? OSC_PAL/15 : OSC_NTSC/15, PsndRate);
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// calculate PsndLen
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PsndLen=PsndRate/(Pico.m.pal ? 50 : 60);
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// recalculate dac info
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dac_recalculate();
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z80stopCycle = 0;
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}
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// to be called after changing sound rate or chips
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void sound_rerate()
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{
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unsigned int state[28];
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YM2612Init(Pico.m.pal ? OSC_PAL/7 : OSC_NTSC/7, PsndRate);
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// feed it back it's own registers, just like after loading state
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YM2612PicoStateLoad();
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memcpy(state, sn76496_regs, 28*4); // remember old state
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SN76496_init(Pico.m.pal ? OSC_PAL/15 : OSC_NTSC/15, PsndRate);
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memcpy(sn76496_regs, state, 28*4); // restore old state
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// calculate PsndLen
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PsndLen=PsndRate/(Pico.m.pal ? 50 : 60);
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// recalculate dac info
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dac_recalculate();
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}
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// This is called once per raster (aka line), but not necessarily for every line
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int sound_timers_and_dac(int raster)
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{
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if(raster >= 0 && PsndOut && (PicoOpt&1) && *ym2612_dacen) {
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short dout = (short) *ym2612_dacout;
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int pos=dac_info[raster], len=pos&0xf;
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short *d;
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pos>>=4;
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if(PicoOpt&8) { // only left channel for stereo (will be copied to right by ym2612 mixing code)
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d=PsndOut+pos*2;
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while(len--) { *d = dout; d += 2; }
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} else {
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d=PsndOut+pos;
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while(len--) *d++ = dout;
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}
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}
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//dprintf("s: %03i", raster);
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// Our raster lasts 63.61323/64.102564 microseconds (NTSC/PAL)
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YM2612PicoTick(1);
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return 0;
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}
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int sound_render(int offset, int length)
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{
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int stereo = (PicoOpt & 8) >> 3;
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offset <<= stereo;
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// PSG
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if(PicoOpt & 2)
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SN76496Update(PsndOut+offset, length, stereo);
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// Add in the stereo FM buffer
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if(PicoOpt & 1) {
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YM2612UpdateOne(PsndOut+offset, length, stereo);
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} else {
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// YM2612 upmixes to stereo, so we have to do this manually here
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int i;
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short *s = PsndOut+offset;
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for (i = 0; i < length; i++) {
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*(s+1) = *s; s+=2;
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}
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}
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return 0;
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}
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#if defined(_USE_MZ80)
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// memhandlers for mz80 core
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unsigned char mz80_read(UINT32 a, struct MemoryReadByte *w) { return z80_read(a); }
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void mz80_write(UINT32 a, UINT8 d, struct MemoryWriteByte *w) { z80_write(d, a); }
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// structures for mz80 core
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static struct MemoryReadByte mz80_mem_read[]=
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{
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{0x0000,0xffff,mz80_read},
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{(UINT32) -1,(UINT32) -1,NULL}
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};
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static struct MemoryWriteByte mz80_mem_write[]=
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{
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{0x0000,0xffff,mz80_write},
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{(UINT32) -1,(UINT32) -1,NULL}
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};
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static struct z80PortRead mz80_io_read[] ={
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{(UINT16) -1,(UINT16) -1,NULL}
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};
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static struct z80PortWrite mz80_io_write[]={
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{(UINT16) -1,(UINT16) -1,NULL}
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};
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#elif defined(_USE_DRZ80)
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static struct DrZ80 drZ80;
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static unsigned int DrZ80_rebasePC(unsigned short a)
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{
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drZ80.Z80PC_BASE = (unsigned int) Pico.zram;
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return drZ80.Z80PC_BASE + a;
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}
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static unsigned int DrZ80_rebaseSP(unsigned short a)
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{
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drZ80.Z80SP_BASE = (unsigned int) Pico.zram;
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return drZ80.Z80SP_BASE + a;
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}
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static unsigned char DrZ80_in(unsigned short p)
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{
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return 0xff;
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}
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static void DrZ80_out(unsigned short p,unsigned char d)
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{
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}
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static void DrZ80_irq_callback()
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{
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drZ80.Z80_IRQ = 0; // lower irq when accepted
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}
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#endif
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// z80 functionality wrappers
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void z80_init()
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{
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#if defined(_USE_MZ80)
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struct mz80context z80;
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// z80
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mz80init();
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// Modify the default context
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mz80GetContext(&z80);
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// point mz80 stuff
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z80.z80Base=Pico.zram;
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z80.z80MemRead=mz80_mem_read;
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z80.z80MemWrite=mz80_mem_write;
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z80.z80IoRead=mz80_io_read;
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z80.z80IoWrite=mz80_io_write;
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mz80SetContext(&z80);
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#elif defined(_USE_DRZ80)
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memset(&drZ80, 0, sizeof(struct DrZ80));
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drZ80.z80_rebasePC=DrZ80_rebasePC;
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drZ80.z80_rebaseSP=DrZ80_rebaseSP;
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drZ80.z80_read8 =z80_read;
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drZ80.z80_read16 =z80_read16;
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drZ80.z80_write8 =z80_write;
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drZ80.z80_write16 =z80_write16;
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drZ80.z80_in =DrZ80_in;
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drZ80.z80_out =DrZ80_out;
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drZ80.z80_irq_callback=DrZ80_irq_callback;
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#endif
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}
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void z80_reset()
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{
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#if defined(_USE_MZ80)
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mz80reset();
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#elif defined(_USE_DRZ80)
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memset(&drZ80, 0, 0x54);
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drZ80.Z80F = (1<<2); // set ZFlag
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drZ80.Z80F2 = (1<<2); // set ZFlag
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drZ80.Z80IX = 0xFFFF << 16;
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drZ80.Z80IY = 0xFFFF << 16;
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drZ80.Z80IM = 0; // 1?
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drZ80.Z80PC = drZ80.z80_rebasePC(0);
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drZ80.Z80SP = drZ80.z80_rebaseSP(0x2000); // 0xf000 ?
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#endif
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Pico.m.z80_fakeval = 0; // for faking when Z80 is disabled
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}
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void z80_resetCycles()
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{
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#if defined(_USE_MZ80)
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mz80GetElapsedTicks(1);
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#endif
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}
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void z80_int()
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{
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#if defined(_USE_MZ80)
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mz80int(0);
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#elif defined(_USE_DRZ80)
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drZ80.z80irqvector = 0xFF; // default IRQ vector RST opcode
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drZ80.Z80_IRQ = 1;
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#endif
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}
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// returns number of cycles actually executed
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int z80_run(int cycles)
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{
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#if defined(_USE_MZ80)
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int ticks_pre = mz80GetElapsedTicks(0);
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mz80exec(cycles);
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return mz80GetElapsedTicks(0) - ticks_pre;
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#elif defined(_USE_DRZ80)
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return cycles - DrZ80Run(&drZ80, cycles);
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#else
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return cycles;
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#endif
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}
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void z80_pack(unsigned char *data)
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{
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#if defined(_USE_MZ80)
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struct mz80context mz80;
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*(int *)data = 0x00005A6D; // "mZ"
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mz80GetContext(&mz80);
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memcpy(data+4, &mz80.z80clockticks, sizeof(mz80)-5*4); // don't save base&memhandlers
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#elif defined(_USE_DRZ80)
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*(int *)data = 0x015A7244; // "DrZ" v1
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drZ80.Z80PC = drZ80.z80_rebasePC(drZ80.Z80PC-drZ80.Z80PC_BASE);
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drZ80.Z80SP = drZ80.z80_rebaseSP(drZ80.Z80SP-drZ80.Z80SP_BASE);
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memcpy(data+4, &drZ80, 0x54);
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#endif
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}
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void z80_unpack(unsigned char *data)
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{
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#if defined(_USE_MZ80)
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if(*(int *)data == 0x00005A6D) { // "mZ" save?
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struct mz80context mz80;
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mz80GetContext(&mz80);
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memcpy(&mz80.z80clockticks, data+4, sizeof(mz80)-5*4);
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mz80SetContext(&mz80);
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} else {
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z80_reset();
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z80_int();
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}
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#elif defined(_USE_DRZ80)
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if(*(int *)data == 0x015A7244) { // "DrZ" v1 save?
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memcpy(&drZ80, data+4, 0x54);
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// update bases
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drZ80.Z80PC = drZ80.z80_rebasePC(drZ80.Z80PC-drZ80.Z80PC_BASE);
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drZ80.Z80SP = drZ80.z80_rebaseSP(drZ80.Z80SP-drZ80.Z80SP_BASE);
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} else {
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z80_reset();
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drZ80.Z80IM = 1;
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z80_int(); // try to goto int handler, maybe we won't execute trash there?
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}
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#endif
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}
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void z80_exit()
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{
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#if defined(_USE_MZ80)
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mz80shutdown();
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#endif
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}
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#if defined(__DEBUG_PRINT) || defined(WIN32)
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void z80_debug(char *dstr)
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{
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#if defined(_USE_DRZ80)
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sprintf(dstr, "%sZ80 state: PC: %04x SP: %04x\n", dstr, drZ80.Z80PC-drZ80.Z80PC_BASE, drZ80.Z80SP-drZ80.Z80SP_BASE);
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#endif
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}
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#endif
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