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https://github.com/RaySollium99/picodrive.git
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d527628282
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@379 be3aeb3a-fb24-0410-a615-afba39da0efa
127 lines
2.8 KiB
ArmAsm
127 lines
2.8 KiB
ArmAsm
@ vim:filetype=armasm
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.if 0
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#include "compiler.h"
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.endif
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.global tcache
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.global flush_inval_caches
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.global regfile_load
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.global regfile_store
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.global ssp_hle_800
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@ translation cache buffer
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.text
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.align 12 @ 4096
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.size tcache, TCACHE_SIZE
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tcache:
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.space TCACHE_SIZE
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.text
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.align 2
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flush_inval_caches:
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mov r2, #0x0 @ must be 0
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swi 0x9f0002
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bx lr
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@ SSP_GR0, SSP_X, SSP_Y, SSP_A,
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@ SSP_ST, SSP_STACK, SSP_PC, SSP_P,
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@ SSP_PM0, SSP_PM1, SSP_PM2, SSP_XST,
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@ SSP_PM4, SSP_gr13, SSP_PMC, SSP_AL
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@ register map:
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@ r4: XXYY
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@ r5: A
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@ r6: STACK and emu flags: sss0 * .uu. .lll NZCV (NZCV is PSR bits from ARM)
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@ r7: SSP context
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@ r8: r0-r2 (.210)
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@ r9: r4-r6 (.654)
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@ r10: P
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@ r11: cycles
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@ trashes r2,r3
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regfile_load:
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ldr r7, =ssp
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ldr r7, [r7]
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add r2, r7, #0x400
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add r2, r2, #4
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ldmia r2, {r3,r4,r5,r6,r8}
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mov r3, r3, lsr #16
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mov r3, r3, lsl #16
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orr r4, r3, r4, lsr #16 @ XXYY
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and r8, r8, #0x0f0000
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mov r8, r8, lsl #13 @ sss0 *
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and r9, r6, #0x670000
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tst r6, #0x80000000
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orrne r8, r8, #0x8
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tst r6, #0x20000000
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orrne r8, r8, #0x4 @ sss0 * NZ..
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orr r6, r8, r9, lsr #12 @ sss0 * .uu. .lll NZ..
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ldr r8, [r7, #0x440] @ r0-r2
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ldr r9, [r7, #0x444] @ r4-r6
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ldr r10,[r7, #(0x400+7*4)] @ P
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bx lr
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regfile_store:
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str r10,[r7, #(0x400+7*4)] @ P
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str r8, [r7, #0x440] @ r0-r2
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str r9, [r7, #0x444] @ r4-r6
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mov r9, r6, lsr #13
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and r9, r9, #(7<<16) @ STACK
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mov r3, r6, lsl #28
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msr cpsr_flg, r3 @ to to ARM PSR
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and r6, r6, #0x670
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mov r6, r6, lsl #12
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orrmi r6, r6, #0x80000000 @ N
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orreq r6, r6, #0x20000000 @ Z
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mov r3, r4, lsl #16 @ Y
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mov r2, r4, lsr #16
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mov r2, r2, lsl #16 @ X
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add r8, r7, #0x400
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add r8, r8, #4
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stmia r8, {r2,r3,r5,r6,r9}
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bx lr
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#define SSP_OFFS_GR 0x400
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#define SSP_OFFS_EMUST 0x484
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#define SSP_PM0 8
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#define SSP_PC 6
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#define SSP_WAIT_PM0 0x2000
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@ ld A, PM0
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@ andi 2
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@ bra z=1, gloc_0800
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ssp_hle_800:
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@ block prologue
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stmfd sp!, {r4-r11, lr}
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bl regfile_load
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mov r11, #0
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ldr r0, [r7, #(SSP_OFFS_GR+SSP_PM0*4)]
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ldr r1, [r7, #SSP_OFFS_EMUST]
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tst r0, #0x20000
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orreq r1, r1, #SSP_WAIT_PM0
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addeq r11,r11, #1024
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streq r1, [r7, #SSP_OFFS_EMUST]
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movne r0, #0x04000000
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orrne r0, r0, #0x00040000
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strne r0, [r7, #(SSP_OFFS_GR+SSP_PC*4)]
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bl regfile_store
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add r0, r11, #3
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ldmfd sp!, {r4-r11, lr}
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bx lr
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