mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
9839d126cc
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@261 be3aeb3a-fb24-0410-a615-afba39da0efa
131 lines
3 KiB
ArmAsm
131 lines
3 KiB
ArmAsm
@ vim:filetype=armasm
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.global vidCpy8to16 @ void *dest, void *src, short *pal, int lines|(is32col<<8)
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vidCpy8to16:
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stmfd sp!, {r4-r8,lr}
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tst r3, #0x100
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and r3, r3, #0xff
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mov r3, r3, lsr #1
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orr r3, r3, r3, lsl #8
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orreq r3, r3, #(320/8-1)<<24 @ 40 col mode
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orrne r3, r3, #(256/8-1)<<24 @ 32 col mode
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orrne r3, r3, #0x10000
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addne r0, r0, #32*2
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add r1, r1, #8
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mov lr, #0xff
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mov lr, lr, lsl #1
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@ even lines first
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vcloop_aligned:
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ldr r12, [r1], #4
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ldr r7, [r1], #4
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and r4, lr, r12,lsl #1
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ldrh r4, [r2, r4]
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and r5, lr, r12,lsr #7
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ldrh r5, [r2, r5]
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and r6, lr, r12,lsr #15
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ldrh r6, [r2, r6]
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orr r4, r4, r5, lsl #16
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and r5, lr, r12,lsr #23
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ldrh r5, [r2, r5]
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and r8, lr, r7, lsl #1
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ldrh r8, [r2, r8]
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orr r5, r6, r5, lsl #16
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and r6, lr, r7, lsr #7
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ldrh r6, [r2, r6]
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and r12,lr, r7, lsr #15
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ldrh r12,[r2, r12]
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and r7, lr, r7, lsr #23
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ldrh r7, [r2, r7]
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orr r8, r8, r6, lsl #16
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subs r3, r3, #1<<24
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orr r12,r12, r7, lsl #16
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stmia r0!, {r4,r5,r8,r12}
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bpl vcloop_aligned
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tst r3, #0x10000
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add r1, r1, #336 @ skip a line and 1 col
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addne r1, r1, #64 @ skip more for 32col mode
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add r0, r0, #(320+2)*2
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addne r0, r0, #64*2
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addeq r3, r3, #(320/8)<<24
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addne r3, r3, #(256/8)<<24
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sub r3, r3, #1
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tst r3, #0xff
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bne vcloop_aligned
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and r4, r3, #0xff00
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orr r3, r3, r4, lsr #8
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mov r4, r4, lsr #7
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sub r6, r4, #1
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mov r5, #320*2
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add r5, r5, #2
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mul r4, r5, r6
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sub r0, r0, r4
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mov r5, #328
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mul r4, r5, r6
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sub r1, r1, r4
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sub r0, r0, #2
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mov r8, #0
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vcloop_unaligned:
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ldr r12, [r1], #4
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ldr r7, [r1], #4
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and r6, lr, r12, lsl #1
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ldrh r6, [r2, r6]
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and r5, lr, r12, lsr #7
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ldrh r5, [r2, r5]
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orr r4, r8, r6, lsl #16
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and r6, lr, r12, lsr #15
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ldrh r6, [r2, r6]
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and r8, lr, r12, lsr #23
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ldrh r8, [r2, r8]
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orr r5, r5, r6, lsl #16
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and r6, lr, r7, lsl #1
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ldrh r6, [r2, r6]
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and r12,lr, r7, lsr #7
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ldrh r12,[r2, r12]
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orr r6, r8, r6, lsl #16
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and r8, lr, r7, lsr #15
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ldrh r8, [r2, r8]
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subs r3, r3, #1<<24
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and r7, lr, r7, lsr #23
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orr r12,r12,r8, lsl #16
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ldrh r8, [r2, r7]
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stmia r0!, {r4,r5,r6,r12}
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bpl vcloop_unaligned
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strh r8, [r0]
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mov r8, #0
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tst r3, #0x10000
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add r1, r1, #336 @ skip a line and 1 col
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addne r1, r1, #64 @ skip more for 32col mode
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add r0, r0, #(320+2)*2
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addne r0, r0, #64*2
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addeq r3, r3, #(320/8)<<24
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addne r3, r3, #(256/8)<<24
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sub r3, r3, #1
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tst r3, #0xff
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bne vcloop_unaligned
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ldmfd sp!, {r4-r8,lr}
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bx lr
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