mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
f48f5e3b46
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@361 be3aeb3a-fb24-0410-a615-afba39da0efa
685 lines
14 KiB
C
685 lines
14 KiB
C
// 187 blocks, 12072 bytes
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// 14 IRAM blocks
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#include "../../PicoInt.h"
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#include "compiler.h"
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static unsigned int *block_table[0x5090/2];
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static unsigned int *block_table_iram[15][0x800/2];
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static unsigned int *tcache_ptr = NULL;
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static int had_jump = 0;
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static int nblocks = 0;
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static int iram_context = 0;
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#define EMBED_INTERPRETER
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#define ssp1601_reset ssp1601_reset_local
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#define ssp1601_run ssp1601_run_local
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#define GET_PC() rPC
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#define GET_PPC_OFFS() (GET_PC()*2 - 2)
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#define SET_PC(d) { had_jump = 1; rPC = d; } /* must return to dispatcher after this */
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//#define GET_PC() (PC - (unsigned short *)svp->iram_rom)
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//#define GET_PPC_OFFS() ((unsigned int)PC - (unsigned int)svp->iram_rom - 2)
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//#define SET_PC(d) PC = (unsigned short *)svp->iram_rom + d
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#include "ssp16.c"
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#include "gen_arm.c"
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// -----------------------------------------------------
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// ld d, s
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static void op00(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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PC = ((unsigned short *)(void *)&op) + 1; /* FIXME: needed for interpreter */
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if (op == 0) return; // nop
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if (op == ((SSP_A<<4)|SSP_P)) { // A <- P
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// not sure. MAME claims that only hi word is transfered.
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read_P(); // update P
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rA32 = rP.v;
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}
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else
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{
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tmpv = REG_READ(op & 0x0f);
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REG_WRITE((op & 0xf0) >> 4, tmpv);
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}
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}
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// ld d, (ri)
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static void op01(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ptr1_read(op); REG_WRITE((op & 0xf0) >> 4, tmpv);
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}
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// ld (ri), s
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static void op02(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = REG_READ((op & 0xf0) >> 4); ptr1_write(op, tmpv);
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}
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// ldi d, imm
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static void op04(unsigned int op, unsigned int imm)
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{
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REG_WRITE((op & 0xf0) >> 4, imm);
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}
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// ld d, ((ri))
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static void op05(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ptr2_read(op); REG_WRITE((op & 0xf0) >> 4, tmpv);
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}
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// ldi (ri), imm
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static void op06(unsigned int op, unsigned int imm)
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{
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ptr1_write(op, imm);
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}
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// ld adr, a
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static void op07(unsigned int op, unsigned int imm)
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{
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ssp->RAM[op & 0x1ff] = rA;
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}
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// ld d, ri
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static void op09(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = rIJ[(op&3)|((op>>6)&4)]; REG_WRITE((op & 0xf0) >> 4, tmpv);
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}
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// ld ri, s
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static void op0a(unsigned int op, unsigned int imm)
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{
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rIJ[(op&3)|((op>>6)&4)] = REG_READ((op & 0xf0) >> 4);
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}
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// ldi ri, simm (also op0d op0e op0f)
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static void op0c(unsigned int op, unsigned int imm)
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{
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rIJ[(op>>8)&7] = op;
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}
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// call cond, addr
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static void op24(unsigned int op, unsigned int imm)
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{
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int cond = 0;
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do {
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COND_CHECK
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if (cond) { int new_PC = imm; write_STACK(GET_PC()); SET_PC(new_PC); }
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}
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while (0);
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}
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// ld d, (a)
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static void op25(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ((unsigned short *)svp->iram_rom)[rA]; REG_WRITE((op & 0xf0) >> 4, tmpv);
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}
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// bra cond, addr
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static void op26(unsigned int op, unsigned int imm)
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{
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do
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{
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int cond = 0;
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COND_CHECK
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if (cond) SET_PC(imm);
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}
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while (0);
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}
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// mod cond, op
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static void op48(unsigned int op, unsigned int imm)
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{
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do
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{
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int cond = 0;
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COND_CHECK
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if (cond) {
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switch (op & 7) {
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case 2: rA32 = (signed int)rA32 >> 1; break; // shr (arithmetic)
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case 3: rA32 <<= 1; break; // shl
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case 6: rA32 = -(signed int)rA32; break; // neg
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case 7: if ((int)rA32 < 0) rA32 = -(signed int)rA32; break; // abs
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default: elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: unhandled mod %i @ %04x",
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op&7, GET_PPC_OFFS());
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}
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UPD_ACC_ZN // ?
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}
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}
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while(0);
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}
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// mpys?
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static void op1b(unsigned int op, unsigned int imm)
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{
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read_P(); // update P
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rA32 -= rP.v; // maybe only upper word?
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UPD_ACC_ZN // there checking flags after this
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rX = ptr1_read_(op&3, 0, (op<<1)&0x18); // ri (maybe rj?)
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rY = ptr1_read_((op>>4)&3, 4, (op>>3)&0x18); // rj
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}
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// mpya (rj), (ri), b
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static void op4b(unsigned int op, unsigned int imm)
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{
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read_P(); // update P
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rA32 += rP.v; // confirmed to be 32bit
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UPD_ACC_ZN // ?
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rX = ptr1_read_(op&3, 0, (op<<1)&0x18); // ri (maybe rj?)
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rY = ptr1_read_((op>>4)&3, 4, (op>>3)&0x18); // rj
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}
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// mld (rj), (ri), b
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static void op5b(unsigned int op, unsigned int imm)
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{
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rA32 = 0;
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rST &= 0x0fff; // ?
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rX = ptr1_read_(op&3, 0, (op<<1)&0x18); // ri (maybe rj?)
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rY = ptr1_read_((op>>4)&3, 4, (op>>3)&0x18); // rj
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}
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// OP a, s
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static void op10(unsigned int op, unsigned int imm)
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{
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do
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{
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unsigned int tmpv;
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OP_CHECK32(OP_SUBA32); tmpv = REG_READ(op & 0x0f); OP_SUBA(tmpv);
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}
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while(0);
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}
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static void op30(unsigned int op, unsigned int imm)
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{
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do
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{
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unsigned int tmpv;
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OP_CHECK32(OP_CMPA32); tmpv = REG_READ(op & 0x0f); OP_CMPA(tmpv);
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}
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while(0);
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}
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static void op40(unsigned int op, unsigned int imm)
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{
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do
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{
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unsigned int tmpv;
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OP_CHECK32(OP_ADDA32); tmpv = REG_READ(op & 0x0f); OP_ADDA(tmpv);
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}
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while(0);
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}
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static void op50(unsigned int op, unsigned int imm)
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{
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do
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{
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unsigned int tmpv;
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OP_CHECK32(OP_ANDA32); tmpv = REG_READ(op & 0x0f); OP_ANDA(tmpv);
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}
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while(0);
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}
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static void op60(unsigned int op, unsigned int imm)
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{
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do
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{
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unsigned int tmpv;
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OP_CHECK32(OP_ORA32 ); tmpv = REG_READ(op & 0x0f); OP_ORA (tmpv);
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}
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while(0);
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}
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static void op70(unsigned int op, unsigned int imm)
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{
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do
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{
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unsigned int tmpv;
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OP_CHECK32(OP_EORA32); tmpv = REG_READ(op & 0x0f); OP_EORA(tmpv);
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}
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while(0);
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}
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// OP a, (ri)
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static void op11(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ptr1_read(op); OP_SUBA(tmpv);
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}
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static void op31(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ptr1_read(op); OP_CMPA(tmpv);
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}
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static void op41(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ptr1_read(op); OP_ADDA(tmpv);
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}
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static void op51(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ptr1_read(op); OP_ANDA(tmpv);
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}
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static void op61(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ptr1_read(op); OP_ORA (tmpv);
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}
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static void op71(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ptr1_read(op); OP_EORA(tmpv);
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}
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// OP a, adr
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static void op03(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ssp->RAM[op & 0x1ff]; OP_LDA (tmpv);
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}
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static void op13(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ssp->RAM[op & 0x1ff]; OP_SUBA(tmpv);
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}
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static void op33(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ssp->RAM[op & 0x1ff]; OP_CMPA(tmpv);
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}
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static void op43(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ssp->RAM[op & 0x1ff]; OP_ADDA(tmpv);
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}
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static void op53(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ssp->RAM[op & 0x1ff]; OP_ANDA(tmpv);
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}
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static void op63(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ssp->RAM[op & 0x1ff]; OP_ORA (tmpv);
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}
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static void op73(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ssp->RAM[op & 0x1ff]; OP_EORA(tmpv);
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}
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// OP a, imm
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static void op14(unsigned int op, unsigned int imm)
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{
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OP_SUBA(imm);
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}
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static void op34(unsigned int op, unsigned int imm)
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{
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OP_CMPA(imm);
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}
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static void op44(unsigned int op, unsigned int imm)
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{
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OP_ADDA(imm);
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}
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static void op54(unsigned int op, unsigned int imm)
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{
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OP_ANDA(imm);
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}
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static void op64(unsigned int op, unsigned int imm)
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{
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OP_ORA (imm);
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}
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static void op74(unsigned int op, unsigned int imm)
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{
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OP_EORA(imm);
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}
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// OP a, ((ri))
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static void op15(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ptr2_read(op); OP_SUBA(tmpv);
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}
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static void op35(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ptr2_read(op); OP_CMPA(tmpv);
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}
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static void op45(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ptr2_read(op); OP_ADDA(tmpv);
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}
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static void op55(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ptr2_read(op); OP_ANDA(tmpv);
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}
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static void op65(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ptr2_read(op); OP_ORA (tmpv);
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}
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static void op75(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = ptr2_read(op); OP_EORA(tmpv);
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}
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// OP a, ri
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static void op19(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = rIJ[IJind]; OP_SUBA(tmpv);
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}
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static void op39(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = rIJ[IJind]; OP_CMPA(tmpv);
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}
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static void op49(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = rIJ[IJind]; OP_ADDA(tmpv);
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}
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static void op59(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = rIJ[IJind]; OP_ANDA(tmpv);
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}
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static void op69(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = rIJ[IJind]; OP_ORA (tmpv);
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}
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static void op79(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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tmpv = rIJ[IJind]; OP_EORA(tmpv);
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}
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// OP simm
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static void op1c(unsigned int op, unsigned int imm)
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{
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OP_SUBA(op & 0xff);
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}
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static void op3c(unsigned int op, unsigned int imm)
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{
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OP_CMPA(op & 0xff);
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}
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static void op4c(unsigned int op, unsigned int imm)
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{
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OP_ADDA(op & 0xff);
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}
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static void op5c(unsigned int op, unsigned int imm)
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{
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OP_ANDA(op & 0xff);
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}
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static void op6c(unsigned int op, unsigned int imm)
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{
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OP_ORA (op & 0xff);
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}
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static void op7c(unsigned int op, unsigned int imm)
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{
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OP_EORA(op & 0xff);
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}
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typedef void (in_func)(unsigned int op, unsigned int imm);
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static in_func *in_funcs[0x80] =
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{
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op00, op01, op02, op03, op04, op05, op06, op07,
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NULL, op09, op0a, NULL, op0c, op0c, op0c, op0c,
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op10, op11, NULL, op13, op14, op15, NULL, NULL,
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NULL, op19, NULL, op1b, op1c, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, op24, op25, op26, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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op30, op31, NULL, op33, op34, op35, NULL, NULL,
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NULL, op39, NULL, NULL, op3c, NULL, NULL, NULL,
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op40, op41, NULL, op43, op44, op45, NULL, NULL,
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op48, op49, NULL, op4b, op4c, NULL, NULL, NULL,
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op50, op51, NULL, op53, op54, op55, NULL, NULL,
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NULL, op59, NULL, op5b, op5c, NULL, NULL, NULL,
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op60, op61, NULL, op63, op64, op65, NULL, NULL,
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NULL, op69, NULL, NULL, op6c, NULL, NULL, NULL,
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op70, op71, NULL, op73, op74, op75, NULL, NULL,
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NULL, op79, NULL, NULL, op7c, NULL, NULL, NULL,
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};
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// -----------------------------------------------------
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static unsigned char iram_context_map[] =
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{
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0, 0, 0, 0, 1, 0, 0, 0, // 04
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0, 0, 0, 0, 0, 0, 2, 0, // 0e
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0, 0, 0, 0, 0, 3, 0, 4, // 15 17
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5, 0, 0, 6, 0, 7, 0, 0, // 18 1b 1d
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8, 9, 0, 0, 0,10, 0, 0, // 20 21 25
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0, 0, 0, 0, 0, 0, 0, 0,
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0, 0,11, 0, 0,12, 0, 0, // 32 35
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13,14, 0, 0, 0, 0, 0, 0 // 38 39
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};
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static int get_iram_context(void)
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{
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unsigned char *ir = (unsigned char *)svp->iram_rom;
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int val1, val = ir[0x083^1] + ir[0x4FA^1] + ir[0x5F7^1] + ir[0x47B^1];
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val1 = iram_context_map[(val>>1)&0x3f];
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if (val1 == 0) {
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printf("val: %02x PC=%04x\n", (val>>1)&0x3f, rPC);
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//debug_dump2file(name, svp->iram_rom, 0x800);
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exit(1);
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}
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// elprintf(EL_ANOMALY, "iram_context: %02i", val1);
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return val1;
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}
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#define PROGRAM(x) ((unsigned short *)svp->iram_rom)[x]
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static int translate_op(unsigned int op, int *pc)
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{
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switch (op >> 9)
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{
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// ld d, s
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case 0x00:
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if (op == 0) return 1; // nop
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|
break;
|
|
|
|
// ld a, adr
|
|
case 0x03:
|
|
EOP_ADD_IMM(0,7,1,30/2,(op&0x180)>>1); // add r1, r7, ((op&0x180)<<1)
|
|
EOP_LDRH_IMM(0,1,(op&0x7f)<<1); // ldr r0, [r1, (op&0x7f)<<1]
|
|
EOP_MOV_REG_LSL(5, 5, 16); // mov r5, r5, lsl #16 @ A
|
|
EOP_ORR_REG_SIMPLE(5, 0); // orr r5, r5, r0
|
|
EOP_MOV_REG_ROR(5,5,16); // mov r5, r5, ror #16
|
|
return 1;
|
|
|
|
// ld adr, a
|
|
case 0x07:
|
|
EOP_ADD_IMM(0,7,1,30/2,(op&0x180)>>1); // add r1, r7, ((op&0x180)<<1)
|
|
EOP_MOV_REG_LSR(0, 5, 16); // mov r0, r5, lsr #16 @ A
|
|
EOP_STRH_IMM(0,1,(op&0x7f)<<1); // str r0, [r1, (op&0x7f)<<1]
|
|
return 1;
|
|
}
|
|
|
|
return -1;
|
|
}
|
|
|
|
static void *translate_block(int pc)
|
|
{
|
|
unsigned int op, op1, imm, ccount = 0;
|
|
unsigned int *block_start;
|
|
int ret;
|
|
|
|
// create .pool
|
|
//*tcache_ptr++ = (u32) in_funcs; // -1 func pool
|
|
|
|
printf("translate %04x -> %04x\n", pc<<1, (tcache_ptr-tcache)<<2);
|
|
block_start = tcache_ptr;
|
|
|
|
emit_block_prologue();
|
|
|
|
for (; ccount < 100;)
|
|
{
|
|
//printf(" insn #%i\n", icount);
|
|
op = PROGRAM(pc++);
|
|
op1 = op >> 9;
|
|
imm = (u32)-1;
|
|
|
|
if ((op1 & 0xf) == 4 || (op1 & 0xf) == 6)
|
|
imm = PROGRAM(pc++); // immediate
|
|
|
|
ret = translate_op(op, &pc);
|
|
if (ret <= 0)
|
|
{
|
|
emit_mov_const(0, op);
|
|
|
|
// need immediate?
|
|
if (imm != (u32)-1)
|
|
emit_mov_const(1, imm);
|
|
|
|
// dump PC
|
|
emit_pc_dump(pc);
|
|
|
|
emit_interpreter_call(in_funcs[op1]);
|
|
|
|
if (in_funcs[op1] == NULL) {
|
|
printf("NULL func! op=%08x (%02x)\n", op, op1);
|
|
exit(1);
|
|
}
|
|
ccount++;
|
|
}
|
|
else
|
|
ccount += ret;
|
|
|
|
if (op1 == 0x24 || op1 == 0x26 || // call, bra
|
|
((op1 == 0 || op1 == 1 || op1 == 4 || op1 == 5 || op1 == 9 || op1 == 0x25) &&
|
|
(op & 0xf0) == 0x60)) { // ld PC
|
|
break;
|
|
}
|
|
}
|
|
|
|
emit_block_epilogue(ccount + 1);
|
|
*tcache_ptr++ = 0xffffffff; // end of block
|
|
//printf(" %i inst\n", icount);
|
|
|
|
if (tcache_ptr - tcache > TCACHE_SIZE/4) {
|
|
printf("tcache overflow!\n");
|
|
fflush(stdout);
|
|
exit(1);
|
|
}
|
|
|
|
// stats
|
|
nblocks++;
|
|
//if (pc >= 0x400)
|
|
printf("%i blocks, %i bytes\n", nblocks, (tcache_ptr - tcache)*4);
|
|
//printf("%p %p\n", tcache_ptr, emit_block_epilogue);
|
|
|
|
#if 0
|
|
{
|
|
FILE *f = fopen("tcache.bin", "wb");
|
|
fwrite(tcache, 1, (tcache_ptr - tcache)*4, f);
|
|
fclose(f);
|
|
}
|
|
exit(0);
|
|
#endif
|
|
|
|
handle_caches();
|
|
|
|
return block_start;
|
|
}
|
|
|
|
|
|
|
|
// -----------------------------------------------------
|
|
|
|
int ssp1601_dyn_startup(void)
|
|
{
|
|
memset(tcache, 0, TCACHE_SIZE);
|
|
memset(block_table, 0, sizeof(block_table));
|
|
memset(block_table_iram, 0, sizeof(block_table_iram));
|
|
tcache_ptr = tcache;
|
|
*tcache_ptr++ = 0xffffffff;
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
void ssp1601_dyn_reset(ssp1601_t *ssp)
|
|
{
|
|
ssp1601_reset_local(ssp);
|
|
}
|
|
|
|
void ssp1601_dyn_run(int cycles)
|
|
{
|
|
//rPC = 0x1272 >> 1;
|
|
while (cycles > 0)
|
|
{
|
|
int (*trans_entry)(void);
|
|
if (rPC < 0x800/2)
|
|
{
|
|
if (iram_dirty) {
|
|
iram_context = get_iram_context();
|
|
iram_dirty--;
|
|
}
|
|
if (block_table_iram[iram_context][rPC] == NULL)
|
|
block_table_iram[iram_context][rPC] = translate_block(rPC);
|
|
trans_entry = (void *) block_table_iram[iram_context][rPC];
|
|
}
|
|
else
|
|
{
|
|
if (block_table[rPC] == NULL)
|
|
block_table[rPC] = translate_block(rPC);
|
|
trans_entry = (void *) block_table[rPC];
|
|
}
|
|
|
|
had_jump = 0;
|
|
|
|
//printf("enter %04x\n", rPC<<1);
|
|
cycles -= trans_entry();
|
|
//printf("leave %04x\n", rPC<<1);
|
|
}
|
|
// debug_dump2file("tcache.bin", tcache, (tcache_ptr - tcache) << 1);
|
|
// exit(1);
|
|
}
|
|
|