mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
362 lines
9 KiB
C
362 lines
9 KiB
C
/*
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* PicoDrive
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* (C) notaz, 2009,2010,2013
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*
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* This work is licensed under the terms of MAME license.
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* See COPYING file in the top-level directory.
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*/
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#include "../pico_int.h"
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static struct {
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int cycles;
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unsigned mult;
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int ptr;
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int irq_reload;
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int doing_fifo;
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int silent;
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int irq_timer;
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int irq_state;
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short current[2];
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} pwm;
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enum { PWM_IRQ_LOCKED, PWM_IRQ_STOPPED, PWM_IRQ_LOW, PWM_IRQ_HIGH };
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void p32x_pwm_ctl_changed(void)
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{
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int control = Pico32x.regs[0x30 / 2];
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int cycles = Pico32x.regs[0x32 / 2];
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int pwm_irq_opt = PicoIn.opt & POPT_PWM_IRQ_OPT;
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cycles = (cycles - 1) & 0x0fff;
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pwm.cycles = cycles;
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// supposedly we should stop FIFO when xMd is 0,
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// but mars test disagrees
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pwm.mult = 0;
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if ((control & 0x0f) != 0)
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pwm.mult = 0x10000 / cycles;
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pwm.irq_timer = (control & 0x0f00) >> 8;
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pwm.irq_timer = ((pwm.irq_timer - 1) & 0x0f) + 1;
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pwm.irq_reload = pwm.irq_timer;
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pwm.irq_state = pwm_irq_opt ? PWM_IRQ_STOPPED: PWM_IRQ_LOCKED;
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if (Pico32x.pwm_irq_cnt <= 0)
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Pico32x.pwm_irq_cnt = pwm.irq_reload;
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}
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static void do_pwm_irq(SH2 *sh2, unsigned int m68k_cycles)
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{
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p32x_trigger_irq(NULL, m68k_cycles, P32XI_PWM);
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if (Pico32x.regs[0x30 / 2] & P32XP_RTP) {
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p32x_event_schedule(m68k_cycles, P32X_EVENT_PWM, pwm.cycles / 3 + 1);
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// note: might recurse
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p32x_dreq1_trigger();
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}
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}
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static int convert_sample(unsigned int v)
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{
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if (v > pwm.cycles)
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v = pwm.cycles;
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if (v == 0)
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return 0;
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return v * pwm.mult - 0x10000/2;
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}
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#define consume_fifo(sh2, m68k_cycles) { \
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int cycles_diff = ((m68k_cycles) * 3) - Pico32x.pwm_cycle_p; \
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if (cycles_diff >= pwm.cycles) \
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consume_fifo_do(sh2, m68k_cycles, cycles_diff); \
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}
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static void consume_fifo_do(SH2 *sh2, unsigned int m68k_cycles,
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int sh2_cycles_diff)
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{
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struct Pico32xMem *mem = Pico32xMem;
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unsigned short *fifo_l = mem->pwm_fifo[0];
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unsigned short *fifo_r = mem->pwm_fifo[1];
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int sum = 0;
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if (pwm.cycles == 0 || pwm.doing_fifo)
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return;
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elprintf(EL_PWM, "pwm: %u: consume %d/%d, %d,%d ptr %d",
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m68k_cycles, sh2_cycles_diff, sh2_cycles_diff / pwm.cycles,
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Pico32x.pwm_p[0], Pico32x.pwm_p[1], pwm.ptr);
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// this is for recursion from dreq1 writes
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pwm.doing_fifo = 1;
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while (sh2_cycles_diff >= pwm.cycles)
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{
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sh2_cycles_diff -= pwm.cycles;
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if (Pico32x.pwm_p[0] > 0) {
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mem->pwm_index[0] = (mem->pwm_index[0]+1) % 4;
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Pico32x.pwm_p[0]--;
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pwm.current[0] = convert_sample(fifo_l[mem->pwm_index[0]]);
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sum |= (u16)pwm.current[0];
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}
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if (Pico32x.pwm_p[1] > 0) {
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mem->pwm_index[1] = (mem->pwm_index[1]+1) % 4;
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Pico32x.pwm_p[1]--;
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pwm.current[1] = convert_sample(fifo_r[mem->pwm_index[1]]);
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sum |= (u16)pwm.current[1];
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}
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mem->pwm[pwm.ptr * 2 ] = pwm.current[0];
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mem->pwm[pwm.ptr * 2 + 1] = pwm.current[1];
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pwm.ptr = (pwm.ptr + 1) & (PWM_BUFF_LEN - 1);
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if (--Pico32x.pwm_irq_cnt <= 0) {
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Pico32x.pwm_irq_cnt = pwm.irq_reload;
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do_pwm_irq(sh2, m68k_cycles);
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} else if (Pico32x.pwm_p[1] == 0 && pwm.irq_state >= PWM_IRQ_LOW) {
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// buffer underrun. Reduce reload rate if above programmed setting.
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if (pwm.irq_reload > pwm.irq_timer)
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pwm.irq_reload--;
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pwm.irq_state = PWM_IRQ_LOW;
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}
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}
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Pico32x.pwm_cycle_p = m68k_cycles * 3 - sh2_cycles_diff;
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pwm.doing_fifo = 0;
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if (sum != 0)
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pwm.silent = 0;
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}
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static int p32x_pwm_schedule_(SH2 *sh2, unsigned int m68k_now)
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{
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unsigned int pwm_now = m68k_now * 3;
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int cycles_diff_sh2;
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if (pwm.cycles == 0)
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return 0;
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cycles_diff_sh2 = pwm_now - Pico32x.pwm_cycle_p;
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if (cycles_diff_sh2 >= pwm.cycles)
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consume_fifo_do(sh2, m68k_now, cycles_diff_sh2);
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if (!((Pico32x.sh2irq_mask[0] | Pico32x.sh2irq_mask[1]) & 1))
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return 0; // masked by everyone
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cycles_diff_sh2 = pwm_now - Pico32x.pwm_cycle_p;
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return (Pico32x.pwm_irq_cnt * pwm.cycles
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- cycles_diff_sh2) / 3 + 1;
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}
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void p32x_pwm_schedule(unsigned int m68k_now)
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{
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int after = p32x_pwm_schedule_(NULL, m68k_now);
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if (after != 0)
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p32x_event_schedule(m68k_now, P32X_EVENT_PWM, after);
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}
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void p32x_pwm_schedule_sh2(SH2 *sh2)
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{
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int after = p32x_pwm_schedule_(sh2, sh2_cycles_done_m68k(sh2));
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if (after != 0)
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p32x_event_schedule_sh2(sh2, P32X_EVENT_PWM, after);
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}
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void p32x_pwm_sync_to_sh2(SH2 *sh2)
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{
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int m68k_cycles = sh2_cycles_done_m68k(sh2);
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consume_fifo(sh2, m68k_cycles);
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}
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void p32x_pwm_irq_event(unsigned int m68k_now)
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{
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p32x_pwm_schedule(m68k_now);
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}
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unsigned int p32x_pwm_read16(u32 a, SH2 *sh2, unsigned int m68k_cycles)
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{
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unsigned int d = 0;
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consume_fifo(sh2, m68k_cycles);
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a &= 0x0e;
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switch (a/2) {
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case 0/2: // control
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case 2/2: // cycle
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d = Pico32x.regs[(0x30 + a) / 2];
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break;
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case 4/2: // L ch
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if (Pico32x.pwm_p[0] == 3)
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d |= P32XP_FULL;
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else if (Pico32x.pwm_p[0] == 0)
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d |= P32XP_EMPTY;
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break;
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case 6/2: // R ch
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case 8/2: // MONO
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if (Pico32x.pwm_p[1] == 3)
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d |= P32XP_FULL;
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else if (Pico32x.pwm_p[1] == 0)
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d |= P32XP_EMPTY;
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break;
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}
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elprintf(EL_PWM, "pwm: %u: r16 %02x %04x (p %d %d)",
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m68k_cycles, a, d, Pico32x.pwm_p[0], Pico32x.pwm_p[1]);
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return d;
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}
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void p32x_pwm_write16(u32 a, unsigned int d, SH2 *sh2, unsigned int m68k_cycles)
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{
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unsigned short *fifo;
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int idx;
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elprintf(EL_PWM, "pwm: %u: w16 %02x %04x (p %d %d)",
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m68k_cycles, a & 0x0e, d, Pico32x.pwm_p[0], Pico32x.pwm_p[1]);
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consume_fifo(sh2, m68k_cycles);
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a &= 0x0e;
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switch (a/2) {
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case 0/2: // control
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// avoiding pops..
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if ((Pico32x.regs[0x30 / 2] & 0x0f) == 0)
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Pico32xMem->pwm_fifo[0][0] = Pico32xMem->pwm_fifo[1][0] = 0;
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Pico32x.regs[0x30 / 2] = d;
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p32x_pwm_ctl_changed();
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Pico32x.pwm_irq_cnt = pwm.irq_reload; // ?
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break;
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case 2/2: // cycle
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Pico32x.regs[0x32 / 2] = d & 0x0fff;
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p32x_pwm_ctl_changed();
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break;
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case 8/2: // MONO
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case 6/2: // R ch
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fifo = Pico32xMem->pwm_fifo[1];
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idx = Pico32xMem->pwm_index[1];
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if (Pico32x.pwm_p[1] < 3) {
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if (Pico32x.pwm_p[1] == 2 && pwm.irq_state >= PWM_IRQ_STOPPED) {
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// buffer full. If there was no buffer underrun after last fill,
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// try increasing reload rate to reduce IRQs
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if (pwm.irq_reload < 3 && pwm.irq_state == PWM_IRQ_HIGH)
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pwm.irq_reload ++;
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pwm.irq_state = PWM_IRQ_HIGH;
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}
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Pico32x.pwm_p[1]++;
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} else {
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// buffer overflow. Some roms always fill the complete buffer even if
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// reload rate is set below max. Lock reload rate to programmed setting.
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pwm.irq_reload = pwm.irq_timer;
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pwm.irq_state = PWM_IRQ_LOCKED;
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idx = (idx+1) % 4;
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Pico32xMem->pwm_index[1] = idx;
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}
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fifo[(idx+Pico32x.pwm_p[1]) % 4] = (d - 1) & 0x0fff;
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if (a != 8) break; // fallthrough if MONO
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case 4/2: // L ch
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fifo = Pico32xMem->pwm_fifo[0];
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idx = Pico32xMem->pwm_index[0];
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if (Pico32x.pwm_p[0] < 3)
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Pico32x.pwm_p[0]++;
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else {
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idx = (idx+1) % 4;
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Pico32xMem->pwm_index[0] = idx;
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}
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fifo[(idx+Pico32x.pwm_p[0]) % 4] = (d - 1) & 0x0fff;
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break;
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}
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}
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void p32x_pwm_update(s32 *buf32, int length, int stereo)
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{
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short *pwmb;
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int step;
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int p = 0;
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int xmd;
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consume_fifo(NULL, SekCyclesDone());
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xmd = Pico32x.regs[0x30 / 2] & 0x0f;
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if (xmd == 0 || xmd == 0x06 || xmd == 0x09 || xmd == 0x0f)
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goto out; // invalid?
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if (pwm.silent)
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return;
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step = (pwm.ptr << 16) / length;
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pwmb = Pico32xMem->pwm;
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if (stereo)
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{
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if (xmd == 0x05) {
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// normal
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while (length-- > 0) {
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*buf32++ += pwmb[0];
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*buf32++ += pwmb[1];
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p += step;
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pwmb += (p >> 16) * 2;
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p &= 0xffff;
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}
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}
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else if (xmd == 0x0a) {
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// channel swap
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while (length-- > 0) {
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*buf32++ += pwmb[1];
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*buf32++ += pwmb[0];
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p += step;
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pwmb += (p >> 16) * 2;
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p &= 0xffff;
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}
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}
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else {
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// mono - LMD, RMD specify dst
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if (xmd & 0x06) // src is R
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pwmb++;
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if (xmd & 0x0c) // dst is R
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buf32++;
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while (length-- > 0) {
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*buf32 += *pwmb;
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p += step;
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pwmb += (p >> 16) * 2;
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p &= 0xffff;
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buf32 += 2;
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}
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}
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}
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else
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{
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// mostly unused
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while (length-- > 0) {
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*buf32++ += pwmb[0];
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p += step;
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pwmb += (p >> 16) * 2;
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p &= 0xffff;
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}
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}
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elprintf(EL_PWM, "pwm_update: pwm.ptr %d, len %d, step %04x, done %d",
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pwm.ptr, length, step, (pwmb - Pico32xMem->pwm) / 2);
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out:
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pwm.ptr = 0;
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pwm.silent = pwm.current[0] == 0 && pwm.current[1] == 0;
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}
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void p32x_pwm_state_loaded(void)
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{
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int cycles_diff_sh2;
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p32x_pwm_ctl_changed();
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// for old savestates
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cycles_diff_sh2 = Pico.t.m68c_cnt * 3 - Pico32x.pwm_cycle_p;
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if (cycles_diff_sh2 >= pwm.cycles || cycles_diff_sh2 < 0) {
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Pico32x.pwm_irq_cnt = pwm.irq_reload;
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Pico32x.pwm_cycle_p = Pico.t.m68c_cnt * 3;
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p32x_pwm_schedule(Pico.t.m68c_cnt);
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}
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}
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// vim:shiftwidth=2:ts=2:expandtab
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