Fixed MTP to work with TWRP

This commit is contained in:
awab228 2018-06-19 23:16:04 +02:00
commit f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions

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/*
* bq24260_charger.h
* Samsung BQ24260 Charger Header
*
* Copyright (C) 2012 Samsung Electronics, Inc.
*
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __BQ24260_CHARGER_H
#define __BQ24260_CHARGER_H __FILE__
/* Slave address should be shifted to the right 1bit.
* R/W bit should NOT be included.
*/
#define SEC_CHARGER_I2C_SLAVEADDR (0x6B)
/* BQ24260 Registers. */
#define BQ24260_STATUS 0x00
#define BQ24260_CONTROL 0x01
#define BQ24260_VOLTAGE 0x02
#define BQ24260_VENDOR 0x03
#define BQ24260_CURRENT 0x04
#define BQ24260_SPECIAL 0x05
#define BQ24260_SAFETY 0x06
#endif /* __BQ24260_CHARGER_H */

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/*
* p9015_charger.h
* Samsung P9015 Charger Header
*
* Copyright (C) 2014 Samsung Electronics, Inc.
* Yeongmi Ha <yeongmi86.ha@samsung.com>
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __BQ51221_CHARGER_H
#define __BQ51221_CHARGER_H __FILE__
#include <linux/mfd/core.h>
#include <linux/regulator/machine.h>
#include <linux/i2c.h>
#include <linux/battery/sec_charging_common.h>
#include <linux/wakelock.h>
/* REGISTER MAPS */
#define BQ51221_REG_CURRENT_REGISTER 0X01
#define BQ51221_REG_CURRENT_REGISTER2 0X02
#define BQ51221_REG_MAILBOX 0XE0
#define BQ51221_REG_POD_RAM 0XE1
#define BQ51221_REG_USER_HEADER 0XE2
#define BQ51221_REG_VRECT_STATUS 0XE3
#define BQ51221_REG_VOUT_STATUS 0XE4
#define BQ51221_REG_PWR_BYTE_STATUS 0XE8
#define BQ51221_REG_INDICATOR 0XEF
#define BQ51221_REG_PROP_PACKET_PAYLOAD 0XF1
/* WPC HEADER */
#define BQ51221_EPT_HEADER_EPT 0x02
#define BQ51221_EPT_HEADER_CS100 0x05
/* END POWER TRANSFER CODES IN WPC */
#define BQ51221_EPT_CODE_UNKOWN 0x00
#define BQ51221_EPT_CODE_CHARGE_COMPLETE 0x01
#define BQ51221_EPT_CODE_INTERNAL_FAULT 0x02
#define BQ51221_EPT_CODE_OVER_TEMPERATURE 0x03
#define BQ51221_EPT_CODE_OVER_VOLTAGE 0x04
#define BQ51221_EPT_CODE_OVER_CURRENT 0x05
#define BQ51221_EPT_CODE_BATTERY_FAILURE 0x06
#define BQ51221_EPT_CODE_RECONFIGURE 0x07
#define BQ51221_EPT_CODE_NO_RESPONSE 0x08
#define BQ51221_POWER_MODE_MASK (0x1 << 0)
#define BQ51221_SEND_USER_PKT_DONE_MASK (0x1 << 7)
#define BQ51221_SEND_USER_PKT_ERR_MASK (0x3 << 5)
#define BQ51221_SEND_ALIGN_MASK (0x1 << 3)
#define BQ51221_SEND_EPT_CC_MASK (0x1 << 0)
#define BQ51221_SEND_EOC_MASK (0x1 << 0)
#define BQ51221_CS100_VALUE 0x64
#define BQ51221_IOREG_100_VALUE 0x07
#define BQ51221_IOREG_90_VALUE 0x06
#define BQ51221_IOREG_60_VALUE 0x05
#define BQ51221_IOREG_50_VALUE 0x04
#define BQ51221_IOREG_40_VALUE 0x03
#define BQ51221_IOREG_30_VALUE 0x02
#define BQ51221_IOREG_20_VALUE 0x01
#define BQ51221_IOREG_10_VALUE 0x00
#define BQ51221_PTK_ERR_NO_ERR 0x00
#define BQ51221_PTK_ERR_ERR 0x01
#define BQ51221_PTK_ERR_ILLEGAL_HD 0x02
#define BQ51221_PTK_ERR_NO_DEF 0x03
enum {
END_POWER_TRANSFER_CODE_UNKOWN = 0,
END_POWER_TRANSFER_CODE_CHARGECOMPLETE,
END_POWER_TRANSFER_CODE_INTERNAL_FAULT,
END_POWER_TRANSFER_CODE_OVER_TEMPERATURE,
END_POWER_TRANSFER_CODE_OVER_VOLTAGE,
END_POWER_TRANSFER_CODE_OVER_CURRENT,
END_POWER_TRANSFER_CODE_BATTERY_FAILURE,
END_POWER_TRANSFER_CODE_RECONFIGURE,
END_POWER_TRANSFER_CODE_NO_RESPONSE,
};
struct bq51221_charger_platform_data {
int irq_gpio;
int irq_base;
int tsb_gpio;
int cs100_status;
int pad_mode;
int wireless_cc_cv;
int siop_level;
bool default_voreg;
char *wireless_charger_name;
};
#define bq51221_charger_platform_data_t \
struct bq51221_charger_platform_data
struct bq51221_charger_data {
struct i2c_client *client;
struct device *dev;
bq51221_charger_platform_data_t *pdata;
struct mutex io_lock;
struct power_supply psy_chg;
struct wake_lock wpc_wake_lock;
struct workqueue_struct *wqueue;
struct work_struct chgin_work;
struct delayed_work wpc_work;
struct delayed_work isr_work;
int chg_irq;
int irq_base;
int irq_gpio;
int wpc_state;
};
enum {
BQ51221_EVENT_IRQ = 0,
BQ51221_IRQS_NR,
};
enum {
BQ51221_PAD_MODE_NONE = 0,
BQ51221_PAD_MODE_WPC,
BQ51221_PAD_MODE_PMA,
};
#endif /* __BQ51221_CHARGER_H */

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/*
* MAX77693_charger.h
* Samsung MAX77693 Charger Header
*
* Copyright (C) 2012 Samsung Electronics, Inc.
*
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __MAX77693_CHARGER_H
#define __MAX77693_CHARGER_H __FILE__
#include <linux/mfd/core.h>
#include <linux/mfd/max77693.h>
#include <linux/mfd/max77693-private.h>
#include <linux/regulator/machine.h>
#define ENABLE 1
#define DISABLE 0
/* macro */
#define MAX(x, y) ((x) > (y) ? (x) : (y))
#define MIN(x, y) ((x) < (y) ? (x) : (y))
#define ABS(x) ((x) < 0 ? (-1 * (x)) : (x))
/*
* Use for battery
*/
#define OFF_CURR 0 /* charger off current */
#define KEEP_CURR -1 /* keep previous current */
/* MAX77693_CHG_REG_CHG_INT */
#define MAX77693_BYP_I (1 << 0)
#define MAX77693_BATP_I (1 << 2)
#define MAX77693_BAT_I (1 << 3)
#define MAX77693_CHG_I (1 << 4)
#define MAX77693_WCIN_I (1 << 5)
#define MAX77693_CHGIN_I (1 << 6)
/* MAX77693_CHG_REG_CHG_INT_MASK */
#define MAX77693_BYP_IM (1 << 0)
#define MAX77693_THM_IM (1 << 2)
#define MAX77693_BAT_IM (1 << 3)
#define MAX77693_CHG_IM (1 << 4)
#define MAX77693_WCIN_IM (1 << 5)
#define MAX77693_CHGIN_IM (1 << 6)
/* MAX77693_CHG_REG_CHG_INT_OK */
#define MAX77693_BYP_OK 0x01
#define MAX77693_BYP_OK_SHIFT 0
#define MAX77693_BATP_OK 0x04
#define MAX77693_BATP_OK_SHIFT 2
#define MAX77693_BAT_OK 0x08
#define MAX77693_BAT_OK_SHIFT 3
#define MAX77693_CHG_OK 0x10
#define MAX77693_CHG_OK_SHIFT 4
#define MAX77693_WCIN_OK 0x20
#define MAX77693_WCIN_OK_SHIFT 5
#define MAX77693_CHGIN_OK 0x40
#define MAX77693_CHGIN_OK_SHIFT 6
#define MAX77693_DETBAT 0x04
#define MAX77693_DETBAT_SHIFT 2
/* MAX77693_CHG_REG_CHG_DTLS_00 */
#define MAX77693_BATP_DTLS 0x01
#define MAX77693_BATP_DTLS_SHIFT 0
#define MAX77693_WCIN_DTLS 0x18
#define MAX77693_WCIN_DTLS_SHIFT 3
#define MAX77693_CHGIN_DTLS 0x60
#define MAX77693_CHGIN_DTLS_SHIFT 5
/* MAX77693_CHG_REG_CHG_DTLS_01 */
#define MAX77693_CHG_DTLS 0x0F
#define MAX77693_CHG_DTLS_SHIFT 0
#define MAX77693_BAT_DTLS 0x70
#define MAX77693_BAT_DTLS_SHIFT 4
/* MAX77693_CHG_REG_CHG_DTLS_02 */
#define MAX77693_BYP_DTLS 0x0F
#define MAX77693_BYP_DTLS_SHIFT 0
#define MAX77693_BYP_DTLS0 0x1
#define MAX77693_BYP_DTLS1 0x2
#define MAX77693_BYP_DTLS2 0x4
#define MAX77693_BYP_DTLS3 0x8
/* MAX77693_CHG_REG_CHG_CNFG_00 */
#define MAX77693_MODE_DEFAULT 0x04
#define MAX77693_MODE_CHGR 0x01
#define MAX77693_MODE_OTG 0x02
#define MAX77693_MODE_BUCK 0x04
/* MAX77693_CHG_REG_CHG_CNFG_02 */
#define MAX77693_CHG_CC 0x3F
/* MAX77693_CHG_REG_CHG_CNFG_03 */
#define MAX77693_CHG_TO_ITH 0x07
/* MAX77693_CHG_REG_CHG_CNFG_04 */
#define MAX77693_CHG_MINVSYS_MASK 0xE0
#define MAX77693_CHG_MINVSYS_SHIFT 5
#define MAX77693_CHG_PRM_MASK 0x1F
#define MAX77693_CHG_PRM_SHIFT 0
/* MAX77693_CHG_REG_CHG_CNFG_09 */
#define MAX77693_CHG_CHGIN_LIM 0x7F
/* MAX77693_CHG_REG_CHG_CNFG_12 */
#define MAX77693_CHG_WCINSEL 0x40
/* MAX77693_MUIC_REG_CDETCTRL1 */
#define MAX77693_CHGTYPMAN 0x02
#define MAX77693_CHGTYPMAN_SHIFT 1
/* MAX77693_MUIC_REG_STATUS2 */
#define MAX77693_VBVOLT 0x40
#define MAX77693_VBVOLT_SHIFT 6
#define MAX77693_CHGDETRUN 0x08
#define MAX77693_CHGDETRUN_SHIFT 3
#define MAX77693_CHGTYPE 0x07
#define MAX77693_CHGTYPE_SHIFT 0
/* irq */
#define IRQ_DEBOUNCE_TIME 20 /* msec */
/* charger type detection */
#define DET_ERR_RETRY 5
#define DET_ERR_DELAY 200
/* soft charging */
#define SOFT_CHG_START_CURR 100 /* mA */
#define SOFT_CHG_START_DUR 100 /* ms */
#define SOFT_CHG_CURR_STEP 100 /* mA */
#define SOFT_CHG_STEP_DUR 20 /* ms */
#define DEFAULT_AC_CURRENT 1600 /* mA */
#define DEFAULT_USB_CURRENT 500 /* mA */
enum {
POWER_SUPPLY_VBUS_UNKNOWN = 0,
POWER_SUPPLY_VBUS_UVLO,
POWER_SUPPLY_VBUS_WEAK,
POWER_SUPPLY_VBUS_OVLO,
POWER_SUPPLY_VBUS_GOOD,
};
extern sec_battery_platform_data_t sec_battery_pdata;
#endif

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/*
* max77804_charger.h
* Samsung max77804 Charger Header
*
* Copyright (C) 2012 Samsung Electronics, Inc.
*
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __MAX77804_CHARGER_H
#define __MAX77804_CHARGER_H __FILE__
#include <linux/mfd/core.h>
#include <linux/mfd/max77804.h>
#include <linux/mfd/max77804-private.h>
#include <linux/regulator/machine.h>
#if defined(CONFIG_V1A) || defined(CONFIG_N1A)
#define max77888_charger
#else
#undef max77888_charger
#endif
#define ENABLE 1
#define DISABLE 0
/* macro */
#define MAX(x, y) ((x) > (y) ? (x) : (y))
#define MIN(x, y) ((x) < (y) ? (x) : (y))
#define ABS(x) ((x) < 0 ? (-1 * (x)) : (x))
/*
* Use for battery
*/
#define OFF_CURR 0 /* charger off current */
#define KEEP_CURR -1 /* keep previous current */
/* MAX77803 CHG_CNFG_04 register */
#define CHG_CNFG_04_CHG_CV_PRM_SHIFT 0
#define CHG_CNFG_04_CHG_CV_PRM_MASK (0x1f << CHG_CNFG_04_CHG_CV_PRM_SHIFT)
/* MAX77803 CHG_CNFG_12 register */
#define CHG_CNFG_12_CHGINSEL_SHIFT 5
#define CHG_CNFG_12_CHGINSEL_MASK (0x1 << CHG_CNFG_12_CHGINSEL_SHIFT)
/* MAX77804_CHG_REG_CHG_INT */
#define MAX77804_BYP_I (1 << 0)
#define MAX77804_BATP_I (1 << 2)
#define MAX77804_BAT_I (1 << 3)
#define MAX77804_CHG_I (1 << 4)
#define MAX77804_WCIN_I (1 << 5)
#define MAX77804_CHGIN_I (1 << 6)
/* MAX77804_CHG_REG_CHG_INT_MASK */
#define MAX77804_BYP_IM (1 << 0)
#define MAX77804_THM_IM (1 << 2)
#define MAX77804_BAT_IM (1 << 3)
#define MAX77804_CHG_IM (1 << 4)
#define MAX77804_WCIN_IM (1 << 5)
#define MAX77804_CHGIN_IM (1 << 6)
/* MAX77804_CHG_REG_CHG_INT_OK */
#define MAX77804_BYP_OK 0x01
#define MAX77804_BYP_OK_SHIFT 0
#define MAX77804_BATP_OK 0x04
#define MAX77804_BATP_OK_SHIFT 2
#define MAX77804_BAT_OK 0x08
#define MAX77804_BAT_OK_SHIFT 3
#define MAX77804_CHG_OK 0x10
#define MAX77804_CHG_OK_SHIFT 4
#define MAX77804_WCIN_OK 0x20
#define MAX77804_WCIN_OK_SHIFT 5
#define MAX77804_CHGIN_OK 0x40
#define MAX77804_CHGIN_OK_SHIFT 6
#define MAX77804_DETBAT 0x04
#define MAX77804_DETBAT_SHIFT 2
/* MAX77804_CHG_REG_CHG_DTLS_00 */
#define MAX77804_BATP_DTLS 0x01
#define MAX77804_BATP_DTLS_SHIFT 0
#define MAX77804_WCIN_DTLS 0x18
#define MAX77804_WCIN_DTLS_SHIFT 3
#define MAX77804_CHGIN_DTLS 0x60
#define MAX77804_CHGIN_DTLS_SHIFT 5
/* MAX77804_CHG_REG_CHG_DTLS_01 */
#define MAX77804_CHG_DTLS 0x0F
#define MAX77804_CHG_DTLS_SHIFT 0
#define MAX77804_BAT_DTLS 0x70
#define MAX77804_BAT_DTLS_SHIFT 4
/* MAX77804_CHG_REG_CHG_DTLS_02 */
#define MAX77804_BYP_DTLS 0x0F
#define MAX77804_BYP_DTLS_SHIFT 0
#define MAX77804_BYP_DTLS0 0x1
#define MAX77804_BYP_DTLS1 0x2
#define MAX77804_BYP_DTLS2 0x4
#define MAX77804_BYP_DTLS3 0x8
/* MAX77804_CHG_REG_CHG_CNFG_00 */
#define MAX77804_MODE_DEFAULT 0x04
#define MAX77804_MODE_CHGR 0x01
#define MAX77804_MODE_OTG 0x02
#define MAX77804_MODE_BUCK 0x04
#define MAX77804_MODE_BOOST 0x08
/* MAX77804_CHG_REG_CHG_CNFG_02 */
#define MAX77804_CHG_CC 0x3F
/* MAX77804_CHG_REG_CHG_CNFG_03 */
#define MAX77804_CHG_TO_ITH 0x07
/* MAX77804_CHG_REG_CHG_CNFG_04 */
#define MAX77804_CHG_MINVSYS_MASK 0xE0
#define MAX77804_CHG_MINVSYS_SHIFT 5
#define MAX77804_CHG_PRM_MASK 0x1F
#define MAX77804_CHG_PRM_SHIFT 0
/* MAX77804_CHG_REG_CHG_CNFG_09 */
#define MAX77804_CHG_CHGIN_LIM 0x7F
/* MAX77804_CHG_REG_CHG_CNFG_12 */
#define MAX77804_CHG_WCINSEL 0x40
/* MAX77804_MUIC_REG_CDETCTRL1 */
#define MAX77804_CHGTYPMAN 0x02
#define MAX77804_CHGTYPMAN_SHIFT 1
/* MAX77804_MUIC_REG_STATUS2 */
#define MAX77804_VBVOLT 0x40
#define MAX77804_VBVOLT_SHIFT 6
#define MAX77804_CHGDETRUN 0x08
#define MAX77804_CHGDETRUN_SHIFT 3
#define MAX77804_CHGTYPE 0x07
#define MAX77804_CHGTYPE_SHIFT 0
/* irq */
#define IRQ_DEBOUNCE_TIME 20 /* msec */
/* charger type detection */
#define DET_ERR_RETRY 5
#define DET_ERR_DELAY 200
/* soft charging */
#define SOFT_CHG_START_CURR 100 /* mA */
#define SOFT_CHG_START_DUR 100 /* ms */
#define SOFT_CHG_CURR_STEP 100 /* mA */
#define SOFT_CHG_STEP_DUR 20 /* ms */
#define DEFAULT_AC_CURRENT 1600 /* mA */
#define DEFAULT_USB_CURRENT 500 /* mA */
enum {
POWER_SUPPLY_VBUS_UNKNOWN = 0,
POWER_SUPPLY_VBUS_UVLO,
POWER_SUPPLY_VBUS_WEAK,
POWER_SUPPLY_VBUS_OVLO,
POWER_SUPPLY_VBUS_GOOD,
};
extern sec_battery_platform_data_t sec_battery_pdata;
#if defined(CONFIG_TARGET_LOCALE_KOR)
#define SEC_CHG_ATTR(_name) \
{ \
.attr = {.name = #_name, .mode = 0664}, \
.show = sec_chg_show_attrs, \
.store = sec_chg_store_attrs, \
}
enum {
CHG_SIOP_INPUT_LIMIT = 0,
};
#endif
#endif

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/*
* max77823_charger.h
* Samsung MAX77823 Charger Header
*
* Copyright (C) 2012 Samsung Electronics, Inc.
*
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __MAX77823_CHARGER_H
#define __MAX77823_CHARGER_H __FILE__
#include <linux/mfd/core.h>
#include <linux/mfd/max77823.h>
#include <linux/mfd/max77823-private.h>
#include <linux/regulator/machine.h>
#define MAX77823_SAFEOUT2 0x80
/* MAX77823_CHG_REG_CHG_INT */
#define MAX77823_BYP_I (1 << 0)
#define MAX77823_BATP_I (1 << 2)
#define MAX77823_BAT_I (1 << 3)
#define MAX77823_CHG_I (1 << 4)
#define MAX77823_WCIN_I (1 << 5)
#define MAX77823_CHGIN_I (1 << 6)
/* MAX77823_CHG_REG_CHG_INT_MASK */
#define MAX77823_BYP_IM (1 << 0)
#define MAX77823_THM_IM (1 << 2)
#define MAX77823_BAT_IM (1 << 3)
#define MAX77823_CHG_IM (1 << 4)
#define MAX77823_WCIN_IM (1 << 5)
#define MAX77823_CHGIN_IM (1 << 6)
/* MAX77823_CHG_REG_CHG_INT_OK */
#define MAX77823_BYP_OK 0x01
#define MAX77823_BYP_OK_SHIFT 0
#define MAX77823_BATP_OK 0x04
#define MAX77823_BATP_OK_SHIFT 2
#define MAX77823_BAT_OK 0x08
#define MAX77823_BAT_OK_SHIFT 3
#define MAX77823_CHG_OK 0x10
#define MAX77823_CHG_OK_SHIFT 4
#define MAX77823_WCIN_OK 0x20
#define MAX77823_WCIN_OK_SHIFT 5
#define MAX77823_CHGIN_OK 0x40
#define MAX77823_CHGIN_OK_SHIFT 6
#define MAX77823_DETBAT 0x04
#define MAX77823_DETBAT_SHIFT 2
/* MAX77823_CHG_REG_CHG_DTLS_00 */
#define MAX77823_BATP_DTLS 0x01
#define MAX77823_BATP_DTLS_SHIFT 0
#define MAX77823_WCIN_DTLS 0x18
#define MAX77823_WCIN_DTLS_SHIFT 3
#define MAX77823_CHGIN_DTLS 0x60
#define MAX77823_CHGIN_DTLS_SHIFT 5
/* MAX77823_CHG_REG_CHG_DTLS_01 */
#define MAX77823_CHG_DTLS 0x0F
#define MAX77823_CHG_DTLS_SHIFT 0
#define MAX77823_BAT_DTLS 0x70
#define MAX77823_BAT_DTLS_SHIFT 4
/* MAX77823_CHG_REG_CHG_DTLS_02 */
#define MAX77823_BYP_DTLS 0x0F
#define MAX77823_BYP_DTLS_SHIFT 0
#define MAX77823_BYP_DTLS0 0x1
#define MAX77823_BYP_DTLS1 0x2
#define MAX77823_BYP_DTLS2 0x4
#define MAX77823_BYP_DTLS3 0x8
/* MAX77823_CHG_REG_CHG_CNFG_00 */
#define CHG_CNFG_00_MODE_SHIFT 0
#define CHG_CNFG_00_CHG_SHIFT 0
#define CHG_CNFG_00_OTG_SHIFT 1
#define CHG_CNFG_00_BUCK_SHIFT 2
#define CHG_CNFG_00_BOOST_SHIFT 3
#define CHG_CNFG_00_DIS_MUIC_CTRL_SHIFT 5
#define CHG_CNFG_00_MODE_MASK (0xf << CHG_CNFG_00_MODE_SHIFT)
#define CHG_CNFG_00_CHG_MASK (1 << CHG_CNFG_00_CHG_SHIFT)
#define CHG_CNFG_00_OTG_MASK (1 << CHG_CNFG_00_OTG_SHIFT)
#define CHG_CNFG_00_BUCK_MASK (1 << CHG_CNFG_00_BUCK_SHIFT)
#define CHG_CNFG_00_BOOST_MASK (1 << CHG_CNFG_00_BOOST_SHIFT)
#define CHG_CNFG_00_DIS_MUIC_CTRL_MASK (1 << CHG_CNFG_00_DIS_MUIC_CTRL_SHIFT)
#define MAX77823_MODE_DEFAULT 0x04
#define MAX77823_MODE_CHGR 0x01
#define MAX77823_MODE_OTG 0x02
#define MAX77823_MODE_BUCK 0x04
#define MAX77823_MODE_BOOST 0x08
/* MAX77823_CHG_REG_CHG_CNFG_02 */
#define MAX77823_CHG_CC 0x3F
/* MAX77823_CHG_REG_CHG_CNFG_03 */
#define MAX77823_CHG_TO_ITH 0x07
/* MAX77823_CHG_REG_CHG_CNFG_04 */
#define MAX77823_CHG_MINVSYS_MASK 0xE0
#define MAX77823_CHG_MINVSYS_SHIFT 5
#define MAX77823_CHG_PRM_MASK 0x1F
#define MAX77823_CHG_PRM_SHIFT 0
#define CHG_CNFG_04_CHG_CV_PRM_SHIFT 0
#define CHG_CNFG_04_CHG_CV_PRM_MASK (0x3F << CHG_CNFG_04_CHG_CV_PRM_SHIFT)
/* MAX77823_CHG_REG_CHG_CNFG_09 */
#define MAX77823_CHG_CHGIN_LIM 0x7F
/* MAX77823_CHG_REG_CHG_CNFG_12 */
#define MAX77823_CHG_WCINSEL 0x40
/* MAX77823_CHG_REG_CHG_DTLS_00 */
#define MAX77823_BATP_DTLS 0x01
#define MAX77823_BATP_DTLS_SHIFT 0
#define MAX77823_WCIN_DTLS 0x18
#define MAX77823_WCIN_DTLS_SHIFT 3
#define MAX77823_CHGIN_DTLS 0x60
#define MAX77823_CHGIN_DTLS_SHIFT 5
/* MAX77823_CHG_DETAILS_01 */
#define MAX77823_CHG_DTLS 0x0F
#define MAX77823_CHG_DTLS_SHIFT 0
#define MAX77823_BAT_DTLS 0x70
#define MAX77823_BAT_DTLS_SHIFT 4
#define SIOP_INPUT_LIMIT_CURRENT 1200
#define SIOP_CHARGING_LIMIT_CURRENT 1000
#define SLOW_CHARGING_CURRENT_STANDARD 400
struct max77823_charger_data {
struct device *dev;
struct i2c_client *i2c;
struct i2c_client *pmic_i2c;
struct mutex charger_mutex;
struct max77823_platform_data *max77823_pdata;
struct power_supply psy_chg;
struct workqueue_struct *wqueue;
struct work_struct chgin_work;
struct delayed_work isr_work;
struct delayed_work recovery_work; /* softreg recovery work */
struct delayed_work wpc_work; /* wpc detect work */
struct delayed_work chgin_init_work; /* chgin init work */
/* mutex */
struct mutex irq_lock;
struct mutex ops_lock;
/* wakelock */
struct wake_lock recovery_wake_lock;
struct wake_lock wpc_wake_lock;
struct wake_lock chgin_wake_lock;
unsigned int is_charging;
unsigned int charging_type;
unsigned int battery_state;
unsigned int battery_present;
unsigned int cable_type;
unsigned int charging_current_max;
unsigned int charging_current;
unsigned int input_current_limit;
unsigned int vbus_state;
int aicl_on;
int status;
int siop_level;
int uvlo_attach_flag;
int uvlo_attach_cable_type;
int irq_bypass;
int irq_batp;
int irq_battery;
int irq_chg;
int irq_wcin;
int irq_chgin;
/* software regulation */
bool soft_reg_state;
int soft_reg_current;
/* unsufficient power */
bool reg_loop_deted;
/* wireless charge, w(wpc), v(vbus) */
int wc_w_gpio;
int wc_w_irq;
int wc_w_state;
int wc_v_gpio;
int wc_v_irq;
int wc_v_state;
bool wc_pwr_det;
int soft_reg_recovery_cnt;
int pmic_ver;
int input_curr_limit_step;
int wpc_input_curr_limit_step;
int charging_curr_step;
sec_battery_platform_data_t *pdata;
};
extern void cp_usb_power_control(int enable);
#endif /* __MAX77823_CHARGER_H */

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/*
* max77833_charger.h
* Samsung MAX77833 Charger Header
*
* Copyright (C) 2012 Samsung Electronics, Inc.
*
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __MAX77833_CHARGER_H
#define __MAX77833_CHARGER_H __FILE__
#include <linux/mfd/core.h>
#include <linux/mfd/max77833.h>
#include <linux/mfd/max77833-private.h>
#include <linux/regulator/machine.h>
#include <linux/wakelock.h>
enum {
CHIP_ID = 0,
};
ssize_t max77833_chg_show_attrs(struct device *dev,
struct device_attribute *attr, char *buf);
ssize_t max77833_chg_store_attrs(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count);
#define MAX77833_CHARGER_ATTR(_name) \
{ \
.attr = {.name = #_name, .mode = 0664}, \
.show = max77833_chg_show_attrs, \
.store = max77833_chg_store_attrs, \
}
extern sec_battery_platform_data_t sec_battery_pdata;
#define MAX77833_CHG_SAFEOUT2 0x80
/* MAX77833_CHG_REG_CHG_INT */
#define MAX77833_BYP_I (1 << 0)
#define MAX77833_BATP_I (1 << 2)
#define MAX77833_BAT_I (1 << 3)
#define MAX77833_CHG_I (1 << 4)
#define MAX77833_WCIN_I (1 << 5)
#define MAX77833_CHGIN_I (1 << 6)
#define MAX77833_AICL_I (1 << 7)
/* MAX77833_CHG_REG_CHG_INT_MASK */
#define MAX77833_BYP_IM (1 << 0)
#define MAX77833_BATP_IM (1 << 2)
#define MAX77833_BAT_IM (1 << 3)
#define MAX77833_CHG_IM (1 << 4)
#define MAX77833_WCIN_IM (1 << 5)
#define MAX77833_CHGIN_IM (1 << 6)
#define MAX77833_AICL_IM (1 << 7)
/* MAX77833_CHG_REG_CHG_INT_OK */
#define MAX77833_BYP_OK 0x01
#define MAX77833_BYP_OK_SHIFT 0
#define MAX77833_BATP_OK 0x04
#define MAX77833_BATP_OK_SHIFT 2
#define MAX77833_BAT_OK 0x08
#define MAX77833_BAT_OK_SHIFT 3
#define MAX77833_CHG_OK 0x10
#define MAX77833_CHG_OK_SHIFT 4
#define MAX77833_WCIN_OK 0x20
#define MAX77833_WCIN_OK_SHIFT 5
#define MAX77833_CHGIN_OK 0x40
#define MAX77833_CHGIN_OK_SHIFT 6
#define MAX77833_AICL_OK 0x04
#define MAX77833_AICL_OK_SHIFT 7
/* MAX77833_CHG_REG_CHG_DTLS_00 */
#define MAX77833_BATP_DTLS 0x01
#define MAX77833_BATP_DTLS_SHIFT 0
#define MAX77833_WCIN_DTLS 0x30
#define MAX77833_WCIN_DTLS_SHIFT 4
#define MAX77833_CHGIN_DTLS 0xC0
#define MAX77833_CHGIN_DTLS_SHIFT 6
/* MAX77833_CHG_REG_CHG_DTLS_01 */
#define MAX77833_CHG_DTLS 0x0F
#define MAX77833_CHG_DTLS_SHIFT 0
#define MAX77833_BAT_DTLS 0x70
#define MAX77833_BAT_DTLS_SHIFT 4
/* MAX77833_CHG_REG_CHG_DTLS_02 */
#define MAX77833_BYP_DTLS 0x0F
#define MAX77833_BYP_DTLS_SHIFT 0
#define MAX77833_BYP_DTLS0 0x1
#define MAX77833_BYP_DTLS1 0x2
#define MAX77833_BYP_DTLS2 0x4
#define MAX77833_BYP_DTLS3 0x8
/* MAX77833_CHG_REG_CHG_CNFG_00 */
#define CHG_CNFG_00_MODE_SHIFT 0
#define CHG_CNFG_00_CHG_SHIFT 0
#define CHG_CNFG_00_OTG_SHIFT 1
#define CHG_CNFG_00_BUCK_SHIFT 2
#define CHG_CNFG_00_BOOST_SHIFT 3
#define CHG_CNFG_00_MODE_MASK (0xf << CHG_CNFG_00_MODE_SHIFT)
#define CHG_CNFG_00_CHG_MASK (1 << CHG_CNFG_00_CHG_SHIFT)
#define CHG_CNFG_00_OTG_MASK (1 << CHG_CNFG_00_OTG_SHIFT)
#define CHG_CNFG_00_BUCK_MASK (1 << CHG_CNFG_00_BUCK_SHIFT)
#define CHG_CNFG_00_BOOST_MASK (1 << CHG_CNFG_00_BOOST_SHIFT)
#define CHG_CNFG_00_OTG_CTRL (CHG_CNFG_00_OTG_MASK | CHG_CNFG_00_BOOST_MASK)
#define MAX77833_MODE_DEFAULT 0x04
#define MAX77833_MODE_CHGR 0x01
#define MAX77833_MODE_OTG 0x02
#define MAX77833_MODE_BUCK 0x04
#define MAX77833_MODE_BOOST 0x08
/* MAX77833_CHG_REG_CHG_CNFG_02 */
#define MAX77833_CHG_TO_ITH 0x07
#define MAX77833_CHG_TO_TIME 0x38
#define MAX77833_CHG_OTG_ILIM 0xC0
/* MAX77833_CHG_REG_CHG_CNFG_04 */
#define MAX77833_CHG_MINVSYS_MASK 0xE0
#define MAX77833_CHG_MINVSYS_SHIFT 5
#define MAX77833_CHG_PRM_MASK 0x1F
#define MAX77833_CHG_PRM_SHIFT 0
/* MAX77833_CHG_REG_CHG_CNFG_17 */
#define MAX77833_CHG_WCIN_LIM 0x7F
#define REDUCE_CURRENT_STEP 100
#define MINIMUM_INPUT_CURRENT 300
#define SIOP_INPUT_LIMIT_CURRENT 1200
#define SIOP_CHARGING_LIMIT_CURRENT 1000
#define SIOP_WIRELESS_INPUT_LIMIT_CURRENT 530
#define SIOP_WIRELESS_CHARGING_LIMIT_CURRENT 780
#define SIOP_HV_INPUT_LIMIT_CURRENT 700
#define SIOP_HV_CHARGING_LIMIT_CURRENT 1000
#define SLOW_CHARGING_CURRENT_STANDARD 400
#define INPUT_CURRENT_TA 1000
struct max77833_charger_data {
struct device *dev;
struct i2c_client *i2c;
struct i2c_client *pmic_i2c;
struct mutex charger_mutex;
struct max77833_platform_data *max77833_pdata;
struct power_supply psy_chg;
struct workqueue_struct *wqueue;
struct work_struct chgin_work;
struct delayed_work isr_work;
struct delayed_work recovery_work; /* softreg recovery work */
struct delayed_work wpc_work; /* wpc detect work */
struct delayed_work chgin_init_work; /* chgin init work */
struct delayed_work afc_work;
struct delayed_work aicl_work;
/* mutex */
struct mutex irq_lock;
struct mutex ops_lock;
/* wakelock */
struct wake_lock recovery_wake_lock;
struct wake_lock wpc_wake_lock;
struct wake_lock afc_wake_lock;
struct wake_lock chgin_wake_lock;
struct wake_lock aicl_wake_lock;
unsigned int is_charging;
unsigned int charging_type;
unsigned int battery_state;
unsigned int battery_present;
unsigned int cable_type;
unsigned int charging_current_max;
unsigned int charging_current;
unsigned int input_current_limit;
unsigned int vbus_state;
int aicl_on;
int status;
int siop_level;
int uvlo_attach_flag;
int uvlo_attach_cable_type;
int irq_bypass;
int irq_batp;
int irq_aicl;
int irq_battery;
int irq_chg;
int irq_wcin;
int irq_chgin;
/* software regulation */
bool soft_reg_state;
int soft_reg_current;
/* unsufficient power */
bool reg_loop_deted;
/* wireless charge, w(wpc), v(vbus) */
int wc_w_gpio;
int wc_w_irq;
int wc_w_state;
int wc_v_gpio;
int wc_v_irq;
int wc_v_state;
bool wc_pwr_det;
int soft_reg_recovery_cnt;
bool afc_detect;
bool is_mdock;
int pmic_ver;
int input_curr_limit_step;
int wpc_input_curr_limit_step;
int charging_curr_step;
sec_charger_platform_data_t *pdata;
};
#endif /* __MAX77833_CHARGER_H */

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/*
* max77843_charger.h
* Samsung MAX77843 Charger Header
*
* Copyright (C) 2012 Samsung Electronics, Inc.
*
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __MAX77843_CHARGER_H
#define __MAX77843_CHARGER_H __FILE__
#include <linux/mfd/core.h>
#include <linux/mfd/max77843.h>
#include <linux/mfd/max77843-private.h>
#include <linux/regulator/machine.h>
#define MAX77843_CHG_SAFEOUT2 0x80
/* MAX77843_CHG_REG_CHG_INT */
#define MAX77843_BYP_I (1 << 0)
#define MAX77843_BATP_I (1 << 2)
#define MAX77843_BAT_I (1 << 3)
#define MAX77843_CHG_I (1 << 4)
#define MAX77843_WCIN_I (1 << 5)
#define MAX77843_CHGIN_I (1 << 6)
/* MAX77843_CHG_REG_CHG_INT_MASK */
#define MAX77843_BYP_IM (1 << 0)
#define MAX77843_THM_IM (1 << 2)
#define MAX77843_BAT_IM (1 << 3)
#define MAX77843_CHG_IM (1 << 4)
#define MAX77843_WCIN_IM (1 << 5)
#define MAX77843_CHGIN_IM (1 << 6)
/* MAX77843_CHG_REG_CHG_INT_OK */
#define MAX77843_BYP_OK 0x01
#define MAX77843_BYP_OK_SHIFT 0
#define MAX77843_BATP_OK 0x04
#define MAX77843_BATP_OK_SHIFT 2
#define MAX77843_BAT_OK 0x08
#define MAX77843_BAT_OK_SHIFT 3
#define MAX77843_CHG_OK 0x10
#define MAX77843_CHG_OK_SHIFT 4
#define MAX77843_WCIN_OK 0x20
#define MAX77843_WCIN_OK_SHIFT 5
#define MAX77843_CHGIN_OK 0x40
#define MAX77843_CHGIN_OK_SHIFT 6
#define MAX77843_DETBAT 0x04
#define MAX77843_DETBAT_SHIFT 2
/* MAX77843_CHG_REG_CHG_DTLS_00 */
#define MAX77843_BATP_DTLS 0x01
#define MAX77843_BATP_DTLS_SHIFT 0
#define MAX77843_WCIN_DTLS 0x18
#define MAX77843_WCIN_DTLS_SHIFT 3
#define MAX77843_CHGIN_DTLS 0x60
#define MAX77843_CHGIN_DTLS_SHIFT 5
/* MAX77843_CHG_REG_CHG_DTLS_01 */
#define MAX77843_CHG_DTLS 0x0F
#define MAX77843_CHG_DTLS_SHIFT 0
#define MAX77843_BAT_DTLS 0x70
#define MAX77843_BAT_DTLS_SHIFT 4
/* MAX77843_CHG_REG_CHG_DTLS_02 */
#define MAX77843_BYP_DTLS 0x0F
#define MAX77843_BYP_DTLS_SHIFT 0
#define MAX77843_BYP_DTLS0 0x1
#define MAX77843_BYP_DTLS1 0x2
#define MAX77843_BYP_DTLS2 0x4
#define MAX77843_BYP_DTLS3 0x8
/* MAX77843_CHG_REG_CHG_CNFG_00 */
#define CHG_CNFG_00_MODE_SHIFT 0
#define CHG_CNFG_00_CHG_SHIFT 0
#define CHG_CNFG_00_OTG_SHIFT 1
#define CHG_CNFG_00_BUCK_SHIFT 2
#define CHG_CNFG_00_BOOST_SHIFT 3
#define CHG_CNFG_00_MODE_MASK (0xf << CHG_CNFG_00_MODE_SHIFT)
#define CHG_CNFG_00_CHG_MASK (1 << CHG_CNFG_00_CHG_SHIFT)
#define CHG_CNFG_00_OTG_MASK (1 << CHG_CNFG_00_OTG_SHIFT)
#define CHG_CNFG_00_BUCK_MASK (1 << CHG_CNFG_00_BUCK_SHIFT)
#define CHG_CNFG_00_BOOST_MASK (1 << CHG_CNFG_00_BOOST_SHIFT)
#define CHG_CNFG_00_OTG_CTRL (CHG_CNFG_00_OTG_MASK | CHG_CNFG_00_BOOST_MASK)
#define MAX77843_MODE_DEFAULT 0x04
#define MAX77843_MODE_CHGR 0x01
#define MAX77843_MODE_OTG 0x02
#define MAX77843_MODE_BUCK 0x04
#define MAX77843_MODE_BOOST 0x08
/* MAX&7843_CHG_REG_CHG_CNFG_01 */
#define MAX77843_CHG_FQ_2MHz (1 << 3)
/* MAX77843_CHG_REG_CHG_CNFG_02 */
#define MAX77843_CHG_CC 0x3F
/* MAX77843_CHG_REG_CHG_CNFG_03 */
#define MAX77843_CHG_TO_ITH 0x07
/* MAX77843_CHG_REG_CHG_CNFG_04 */
#define MAX77843_CHG_MINVSYS_MASK 0xE0
#define MAX77843_CHG_MINVSYS_SHIFT 5
#define MAX77843_CHG_PRM_MASK 0x1F
#define MAX77843_CHG_PRM_SHIFT 0
#define CHG_CNFG_04_CHG_CV_PRM_SHIFT 0
#define CHG_CNFG_04_CHG_CV_PRM_MASK (0x3F << CHG_CNFG_04_CHG_CV_PRM_SHIFT)
/* MAX77843_CHG_REG_CHG_CNFG_09 */
#define MAX77843_CHG_CHGIN_LIM 0x7F
/* MAX77843_CHG_REG_CHG_CNFG_10 */
#define MAX77843_CHG_WCIN_LIM 0x3F
/* MAX77843_CHG_REG_CHG_CNFG_12 */
#define MAX77843_CHG_WCINSEL 0x40
/* MAX77843_CHG_REG_CHG_DTLS_00 */
#define MAX77843_BATP_DTLS 0x01
#define MAX77843_BATP_DTLS_SHIFT 0
#define MAX77843_WCIN_DTLS 0x18
#define MAX77843_WCIN_DTLS_SHIFT 3
#define MAX77843_CHGIN_DTLS 0x60
#define MAX77843_CHGIN_DTLS_SHIFT 5
/* MAX77843_CHG_DETAILS_01 */
#define MAX77843_CHG_DTLS 0x0F
#define MAX77843_CHG_DTLS_SHIFT 0
#define MAX77843_BAT_DTLS 0x70
#define MAX77843_BAT_DTLS_SHIFT 4
#define SIOP_INPUT_LIMIT_CURRENT 1200
#define SIOP_CHARGING_LIMIT_CURRENT 1000
#define SIOP_WIRELESS_INPUT_LIMIT_CURRENT 660
#define SIOP_WIRELESS_CHARGING_LIMIT_CURRENT 780
#define SLOW_CHARGING_CURRENT_STANDARD 400
struct max77843_charger_data {
struct device *dev;
struct i2c_client *i2c;
struct i2c_client *pmic_i2c;
struct mutex charger_mutex;
struct max77843_platform_data *max77843_pdata;
struct power_supply psy_chg;
struct workqueue_struct *wqueue;
struct work_struct chgin_work;
struct delayed_work isr_work;
struct delayed_work recovery_work; /* softreg recovery work */
struct delayed_work wpc_work; /* wpc detect work */
struct delayed_work chgin_init_work; /* chgin init work */
struct delayed_work afc_work;
/* mutex */
struct mutex irq_lock;
struct mutex ops_lock;
/* wakelock */
struct wake_lock recovery_wake_lock;
struct wake_lock wpc_wake_lock;
struct wake_lock chgin_wake_lock;
unsigned int is_charging;
unsigned int charging_type;
unsigned int battery_state;
unsigned int battery_present;
unsigned int cable_type;
unsigned int charging_current_max;
unsigned int charging_current;
unsigned int input_current_limit;
unsigned int vbus_state;
int aicl_on;
int status;
int siop_level;
int uvlo_attach_flag;
int uvlo_attach_cable_type;
int irq_bypass;
int irq_batp;
int irq_battery;
int irq_chg;
int irq_wcin;
int irq_chgin;
/* software regulation */
bool soft_reg_state;
int soft_reg_current;
/* unsufficient power */
bool reg_loop_deted;
/* wireless charge, w(wpc), v(vbus) */
int wc_w_gpio;
int wc_w_irq;
int wc_w_state;
int wc_v_gpio;
int wc_v_irq;
int wc_v_state;
bool wc_pwr_det;
int soft_reg_recovery_cnt;
bool afc_detect;
bool is_mdock;
int pmic_ver;
int input_curr_limit_step;
int wpc_input_curr_limit_step;
int charging_curr_step;
sec_battery_platform_data_t *pdata;
};
#endif /* __MAX77843_CHARGER_H */

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/*
* drivers/battery/s2mu003_charger.h
*
* Header of Richtek S2MU003 Fuelgauge Driver
*
* Copyright (C) 2013 Richtek Technology Corp.
* Patrick Chang <patrick_chang@richtek.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef S2MU003_CHARGER_H
#define S2MU003_CHARGER_H
#include <linux/mfd/samsung/s2mu003.h>
#include <linux/mfd/samsung/s2mu003_irq.h>
#define S2MU003_CHG_STATUS1 0x00
#define S2MU003_CHG_CTRL1 0x01
#define S2MU003_CHG_CTRL2 0x02
#define S2MU003_CHG_CTRL3 0x04
#define S2MU003_CHG_CTRL4 0x05
#define S2MU003_CHG_CTRL5 0x06
#define S2MU003_SOFTRESET 0x07
#define S2MU003_CHG_CTRL6 0x08
#define S2MU003_CHG_CTRL7 0x09
#define S2MU003_CHG_CTRL8 0x0A
#define S2MU003_CHG_STATUS2 0x0B
#define S2MU003_CHG_STATUS3 0x0C
#define S2MU003_CHG_STATUS4 0x0D
#define S2MU003_CHG_CTRL9 0x0E
#define S2MU003_OTG_SS_ENB_MASK (1 << 0)
#define S2MU003_OPAMODE_MASK (1 << 0)
#define S2MU003_CHG_EN_MASK (1 << 6)
#define S2MU003_TIMEREN_MASK (1 << 0)
#define S2MU003_SEL_SWFREQ_MASK (1 << 2)
#define S2MU003_TEEN_MASK (1 << 3)
#define S2MU003_AICR_LIMIT_MASK (0x7 << 5)
#define S2MU003_AICR_LIMIT_SHIFT 5
#define S2MU003_MIVR_MASK (0x7 << 5)
#define S2MU003_MIVR_SHIFT 5
#define S2MU003_VOREG_MASK (0x3f << 2)
#define S2MU003_VOREG_SHIFT 2
#define S2MU003_IEOC_MASK 0x07
#define S2MU003_IEOC_SHIFT 0
#define S2MU003_ICHRG_MASK 0xf0
#define S2MU003_ICHRG_SHIFT 4
#define S2MU003_CHG_IRQ1 0x60
#define S2MU003_CHG_IRQ2 0x61
#define S2MU003_CHG_IRQ3 0x62
#define S2MU003_CHG_IRQ_CTRL1 0x63
#define S2MU003_CHG_IRQ_CTRL2 0x64
#define S2MU003_CHG_IRQ_CTRL3 0x65
/* S2MU003_CHG_STAT */
#define S2MU003_EXT_PMOS_CTRL 0x1
#define S2MU003_EXT_PMOS_CTRL_SHIFT 7
#define S2MU003SW_HW_CTRL 0x1
#define S2MU003SW_HW_CTRL_SHIFT 2
#define S2MU003_OTG_SS_DISABLE 0x1
#define S2MU003_OTG_SS_DISABLE_SHIFT 1
/* S2MU003_CHR_CTRL1 */
#define S2MU003_IAICR 0x101
#define S2MU003_IAICR_SHIFT 5
#define S2MU003_HIGHER_OCP 0x1
#define S2MU003_HIGHER_OCP_SHIFT 4
#define S2MU003_TERMINATION_EN 0x0
#define S2MU003_TERMINATION_EN_SHIFT 3
#define S2MU003_SEL_SWFREQ 0x1
#define S2MU003_SEL_SWFREQ_SHIFT 2
#define S2MU003_HIGH_IMPEDANCE 0
#define S2MU003_HIGH_IMPEDANCE_SHIFT 1
#define S2MU003_OPA_MODE 2
#define S2MU003_OPA_MODE_SHIFT 0
/* S2MU003_CHG_CTRL2 */
#define S2MU003_REG_VOLTAGE 0x011100
#define S2MU003_REG_VOLTAGE_SHIFT 2
#define S2MU003_TDEG_EOC 0x0
#define S2MU003_TDEG_EOC_SHIFT 0
/* S2MU003_CHG_CTRL3 */
#define S2MU003_PPC_TE 0x0
#define S2MU003_PPC_TE_SHIFT 7
#define S2MU003_CHG_EN 0x1
#define S2MU003_CHG_EN_SHIFT 6
enum {
CHG_REG = 0,
CHG_DATA,
CHG_REGS,
};
struct charger_info {
int dummy;
};
#endif /*S2MU003_CHARGER_H*/

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/*
* smb347_charger.h
* Samsung SMB347 Charger Header
*
* Copyright (C) 2012 Samsung Electronics, Inc.
*
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __SMB347_CHARGER_H
#define __SMB347_CHARGER_H __FILE__
/* Slave address should be shifted to the right 1bit.
* R/W bit should NOT be included.
*/
#define SEC_CHARGER_I2C_SLAVEADDR (0x0C >> 1)
/* Register define */
#define SMB347_CHARGE_CURRENT 0x00
#define SMB347_INPUT_CURRENTLIMIT 0x01
#define SMB347_VARIOUS_FUNCTIONS 0x02
#define SMB347_FLOAT_VOLTAGE 0x03
#define SMB347_CHARGE_CONTROL 0x04
#define SMB347_STAT_TIMERS_CONTROL 0x05
#define SMB347_PIN_ENABLE_CONTROL 0x06
#define SMB347_THERM_CONTROL_A 0x07
#define SMB347_SYSOK_USB30_SELECTION 0x08
#define SMB347_OTHER_CONTROL_A 0x09
#define SMB347_OTG_TLIM_THERM_CONTROL 0x0A
#define SMB347_LIMIT_CELL_TEMPERATURE_MONITOR 0x0B
#define SMB347_FAULT_INTERRUPT 0x0C
#define SMB347_STATUS_INTERRUPT 0x0D
#define SMB347_I2C_BUS_SLAVE_ADDR 0x0E
#define SMB347_COMMAND_A 0x30
#define SMB347_COMMAND_B 0x31
#define SMB347_COMMAND_C 0x33
#define SMB347_INTERRUPT_STATUS_A 0x35
#define SMB347_INTERRUPT_STATUS_B 0x36
#define SMB347_INTERRUPT_STATUS_C 0x37
#define SMB347_INTERRUPT_STATUS_D 0x38
#define SMB347_INTERRUPT_STATUS_E 0x39
#define SMB347_INTERRUPT_STATUS_F 0x3A
#define SMB347_STATUS_A 0x3B
#define SMB347_STATUS_B 0x3C
#define SMB347_STATUS_C 0x3D
#define SMB347_STATUS_D 0x3E
#define SMB347_STATUS_E 0x3F
#endif /* __SMB347_CHARGER_H */