mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
rework sr
note to self: h32 0x10A .. 0x127 0x1D2 .. 0x1FF 0x000 .. 0x109 pclk 30 | 46 | 266 = 342 hbset 0x126 ... 0x009 pclk 29 | 1 + 46 + 10 | 256 mclk 290 | 570 | 2560 = 3420 68kclk 41.4 81.4 365.7 ~= 488.5 h40 0x14A .. 0x16C 0x1C9 .. 0x1FF 0x000 .. 0x149 pclk 35 | 55 | 330 = 420 hbset 0x166 ... 0x00A pclk 28 | 7 + 55 + 11 | 319 mclk 28*8 | 7*8 4*8+314+10+(18+11)*8 | 319*8 = 3420 68kclk 32 92 364.5 ~= 488.5
This commit is contained in:
notaz
parent
22814963cc
commit
0e4bde9b2d
5 changed files with 33 additions and 32 deletions
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@ -108,7 +108,7 @@ static int PicoFrameHints(void)
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}
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else skip=PicoSkipFrame;
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Pico.t.m68c_frame_start = SekCyclesDone();
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Pico.t.m68c_frame_start = Pico.t.m68c_aim;
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pv->v_counter = Pico.m.scanline = 0;
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z80_resetCycles();
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PsndStartFrame();
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@ -170,7 +170,7 @@ static int PicoFrameHints(void)
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}
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// Run scanline:
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Pico.t.m68c_line_start = SekCyclesDone();
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Pico.t.m68c_line_start = Pico.t.m68c_aim;
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do_timing_hacks_as(pv, vdp_slots);
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CPUS_RUN(CYCLES_M68K_LINE);
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@ -205,16 +205,17 @@ static int PicoFrameHints(void)
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do_hint(pv);
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}
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pv->status |= SR_VB; // go into vblank
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pv->status |= SR_VB | PVS_VB2; // go into vblank
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// the following SekRun is there for several reasons:
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// there must be a delay after vblank bit is set and irq is asserted (Mazin Saga)
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// also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants)
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// also delay between last H-int and V-int (Golden Axe 3)
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Pico.t.m68c_line_start = SekCyclesDone();
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Pico.t.m68c_line_start = Pico.t.m68c_aim;
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do_timing_hacks_vb();
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CPUS_RUN(CYCLES_M68K_VINT_LAG);
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pv->status |= SR_F;
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pv->pending_ints |= 0x20;
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if (pv->reg[1] & 0x20) {
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Pico.t.m68c_aim = Pico.t.m68c_cnt + 11; // HACK
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@ -278,7 +279,7 @@ static int PicoFrameHints(void)
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}
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// Run scanline:
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Pico.t.m68c_line_start = SekCyclesDone();
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Pico.t.m68c_line_start = Pico.t.m68c_aim;
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do_timing_hacks_vb();
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CPUS_RUN(CYCLES_M68K_LINE);
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@ -286,7 +287,8 @@ static int PicoFrameHints(void)
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pevt_log_m68k_o(EVT_NEXT_LINE);
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}
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pv->status &= ~SR_VB;
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pv->status &= ~(SR_VB | PVS_VB2);
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pv->status |= ((pv->reg[1] >> 3) ^ SR_VB) & SR_VB; // forced blanking
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// last scanline
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Pico.m.scanline = y;
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@ -302,7 +304,7 @@ static int PicoFrameHints(void)
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}
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// Run scanline:
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Pico.t.m68c_line_start = SekCyclesDone();
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Pico.t.m68c_line_start = Pico.t.m68c_aim;
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do_timing_hacks_as(pv, vdp_slots);
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CPUS_RUN(CYCLES_M68K_LINE);
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@ -287,6 +287,7 @@ extern SH2 sh2s[2];
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#define SR_EMPT (1 << 9)
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// not part of real SR
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#define PVS_ACTIVE (1 << 16)
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#define PVS_VB2 (1 << 17) // ignores forced blanking
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struct PicoVideo
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{
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@ -34,6 +34,7 @@ static int do_ack(int level)
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// the VDP doesn't look at the 68k level
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if (pv->pending_ints & pv->reg[1] & 0x20) {
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pv->pending_ints &= ~0x20;
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pv->status &= ~SR_F;
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return (pv->reg[0] & pv->pending_ints & 0x10) >> 2;
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}
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else if (pv->pending_ints & pv->reg[0] & 0x10)
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@ -564,6 +564,8 @@ readend:
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Pico.m.dirtyPal = 1;
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Pico.video.status &= ~(SR_VB | SR_F);
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Pico.video.status |= ((Pico.video.reg[1] >> 3) ^ SR_VB) & SR_VB;
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Pico.video.status |= (Pico.video.pending_ints << 2) & SR_F;
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retval = 0;
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@ -376,8 +376,7 @@ PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d)
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pvid->pending=0;
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}
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// preliminary FIFO emulation for Chaos Engine, The (E)
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if (!(pvid->status & SR_VB) && (pvid->reg[1] & 0x40) && !(PicoOpt&POPT_DIS_VDP_FIFO)) // active display?
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if (!(pvid->status & SR_VB) && !(PicoOpt&POPT_DIS_VDP_FIFO))
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{
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int use = pvid->type == 1 ? 2 : 1;
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pvid->lwrite_cnt -= use;
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@ -434,6 +433,9 @@ PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d)
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case 0x01:
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elprintf(EL_INTSW, "vint_onoff: %i->%i [%u] pend=%i @ %06x", (dold&0x20)>>5,
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(d&0x20)>>5, SekCyclesDone(), (pvid->pending_ints&0x20)>>5, SekPc);
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if (!(pvid->status & PVS_VB2))
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pvid->status &= ~SR_VB;
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pvid->status |= ((d >> 3) ^ SR_VB) & SR_VB; // forced blanking
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goto update_irq;
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case 0x05:
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//elprintf(EL_STATUS, "spritep moved to %04x", (unsigned)(Pico.video.reg[5]&0x7f) << 9);
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@ -503,25 +505,25 @@ update_irq:
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}
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}
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static u32 SrLow(const struct PicoVideo *pv)
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{
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unsigned int c, d = pv->status;
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c = SekCyclesDone() - Pico.t.m68c_line_start - 39;
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if (c < 92)
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d |= SR_HB;
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return d;
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}
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PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a)
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{
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a&=0x1c;
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a &= 0x1c;
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if (a==0x04) // control port
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if (a == 0x04) // control port
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{
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struct PicoVideo *pv=&Pico.video;
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unsigned int d;
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d=pv->status;
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//if (PicoOpt&POPT_ALT_RENDERER) d|=0x0020; // sprite collision (Shadow of the Beast)
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if (SekCyclesDone() - Pico.t.m68c_line_start >= 488-88)
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d|=0x0004; // H-Blank (Sonic3 vs)
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d |= ((pv->reg[1]&0x40)^0x40) >> 3; // set V-Blank if display is disabled
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d |= (pv->pending_ints&0x20)<<2; // V-int pending?
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if (d&0x100) pv->status&=~0x100; // FIFO no longer full
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pv->pending = 0; // ctrl port reads clear write-pending flag (Charles MacDonald)
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struct PicoVideo *pv = &Pico.video;
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unsigned int d = SrLow(pv);
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pv->pending = 0;
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elprintf(EL_SR, "SR read: %04x [%u] @ %06x", d, SekCyclesDone(), SekPc);
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return d;
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}
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@ -572,12 +574,9 @@ unsigned char PicoVideoRead8DataL(void)
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return VideoRead();
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}
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// FIXME: broken mess
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unsigned char PicoVideoRead8CtlH(void)
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{
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u8 d = (u8)(Pico.video.status >> 8);
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if (d & 1)
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Pico.video.status &= ~0x100; // FIFO no longer full
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Pico.video.pending = 0;
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elprintf(EL_SR, "SR read (h): %02x @ %06x", d, SekPc);
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return d;
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@ -585,11 +584,7 @@ unsigned char PicoVideoRead8CtlH(void)
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unsigned char PicoVideoRead8CtlL(void)
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{
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u8 d = (u8)Pico.video.status;
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//if (PicoOpt&POPT_ALT_RENDERER) d|=0x0020; // sprite collision (Shadow of the Beast)
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d |= ((Pico.video.reg[1]&0x40)^0x40) >> 3; // set V-Blank if display is disabled
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d |= (Pico.video.pending_ints&0x20)<<2; // V-int pending?
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if (SekCyclesDone() - Pico.t.m68c_line_start >= 488-88) d |= 4; // H-Blank
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u8 d = SrLow(&Pico.video);
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Pico.video.pending = 0;
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elprintf(EL_SR, "SR read (l): %02x @ %06x", d, SekPc);
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return d;
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