RaySollium99/picodrive
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rework sr

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note to self:

h32 0x10A .. 0x127 0x1D2 .. 0x1FF 0x000 .. 0x109
pclk      30      |      46      |      266      = 342
hbset       0x126        ...       0x009
pclk   29  |      1   +  46    +  10    |  256
mclk   290 |           570              |  2560  = 3420
68kclk 41.4            81.4               365.7 ~= 488.5

h40 0x14A .. 0x16C 0x1C9 .. 0x1FF 0x000 .. 0x149
pclk      35      |      55      |      330      = 420
hbset       0x166        ...       0x00A
pclk   28  |      7   +  55    +  11    |  319
mclk  28*8 | 7*8   4*8+314+10+(18+11)*8 | 319*8  = 3420
68kclk  32             92                 364.5 ~= 488.5
This commit is contained in:
notaz 2017-10-10 01:13:48 +03:00
parent 22814963cc
commit 0e4bde9b2d
5 changed files with 33 additions and 32 deletions
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16
pico/pico_cmn.c
View file

@ -108,7 +108,7 @@ static int PicoFrameHints(void)
} }
else skip=PicoSkipFrame; else skip=PicoSkipFrame;
Pico.t.m68c_frame_start = SekCyclesDone(); Pico.t.m68c_frame_start = Pico.t.m68c_aim;
pv->v_counter = Pico.m.scanline = 0; pv->v_counter = Pico.m.scanline = 0;
z80_resetCycles(); z80_resetCycles();
PsndStartFrame(); PsndStartFrame();
@ -170,7 +170,7 @@ static int PicoFrameHints(void)
} }
// Run scanline: // Run scanline:
Pico.t.m68c_line_start = SekCyclesDone(); Pico.t.m68c_line_start = Pico.t.m68c_aim;
do_timing_hacks_as(pv, vdp_slots); do_timing_hacks_as(pv, vdp_slots);
CPUS_RUN(CYCLES_M68K_LINE); CPUS_RUN(CYCLES_M68K_LINE);
@ -205,16 +205,17 @@ static int PicoFrameHints(void)
do_hint(pv); do_hint(pv);
} }
pv->status |= SR_VB; // go into vblank pv->status |= SR_VB | PVS_VB2; // go into vblank
// the following SekRun is there for several reasons: // the following SekRun is there for several reasons:
// there must be a delay after vblank bit is set and irq is asserted (Mazin Saga) // there must be a delay after vblank bit is set and irq is asserted (Mazin Saga)
// also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants) // also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants)
// also delay between last H-int and V-int (Golden Axe 3) // also delay between last H-int and V-int (Golden Axe 3)
Pico.t.m68c_line_start = SekCyclesDone(); Pico.t.m68c_line_start = Pico.t.m68c_aim;
do_timing_hacks_vb(); do_timing_hacks_vb();
CPUS_RUN(CYCLES_M68K_VINT_LAG); CPUS_RUN(CYCLES_M68K_VINT_LAG);
pv->status |= SR_F;
pv->pending_ints |= 0x20; pv->pending_ints |= 0x20;
if (pv->reg[1] & 0x20) { if (pv->reg[1] & 0x20) {
Pico.t.m68c_aim = Pico.t.m68c_cnt + 11; // HACK Pico.t.m68c_aim = Pico.t.m68c_cnt + 11; // HACK
@ -278,7 +279,7 @@ static int PicoFrameHints(void)
} }
// Run scanline: // Run scanline:
Pico.t.m68c_line_start = SekCyclesDone(); Pico.t.m68c_line_start = Pico.t.m68c_aim;
do_timing_hacks_vb(); do_timing_hacks_vb();
CPUS_RUN(CYCLES_M68K_LINE); CPUS_RUN(CYCLES_M68K_LINE);
@ -286,7 +287,8 @@ static int PicoFrameHints(void)
pevt_log_m68k_o(EVT_NEXT_LINE); pevt_log_m68k_o(EVT_NEXT_LINE);
} }
pv->status &= ~SR_VB; pv->status &= ~(SR_VB | PVS_VB2);
pv->status |= ((pv->reg[1] >> 3) ^ SR_VB) & SR_VB; // forced blanking
// last scanline // last scanline
Pico.m.scanline = y; Pico.m.scanline = y;
@ -302,7 +304,7 @@ static int PicoFrameHints(void)
} }
// Run scanline: // Run scanline:
Pico.t.m68c_line_start = SekCyclesDone(); Pico.t.m68c_line_start = Pico.t.m68c_aim;
do_timing_hacks_as(pv, vdp_slots); do_timing_hacks_as(pv, vdp_slots);
CPUS_RUN(CYCLES_M68K_LINE); CPUS_RUN(CYCLES_M68K_LINE);

1
pico/pico_int.h
View file

@ -287,6 +287,7 @@ extern SH2 sh2s[2];
#define SR_EMPT (1 << 9) #define SR_EMPT (1 << 9)
// not part of real SR // not part of real SR
#define PVS_ACTIVE (1 << 16) #define PVS_ACTIVE (1 << 16)
#define PVS_VB2 (1 << 17) // ignores forced blanking
struct PicoVideo struct PicoVideo
{ {

1
pico/sek.c
View file

@ -34,6 +34,7 @@ static int do_ack(int level)
// the VDP doesn't look at the 68k level // the VDP doesn't look at the 68k level
if (pv->pending_ints & pv->reg[1] & 0x20) { if (pv->pending_ints & pv->reg[1] & 0x20) {
pv->pending_ints &= ~0x20; pv->pending_ints &= ~0x20;
pv->status &= ~SR_F;
return (pv->reg[0] & pv->pending_ints & 0x10) >> 2; return (pv->reg[0] & pv->pending_ints & 0x10) >> 2;
} }
else if (pv->pending_ints & pv->reg[0] & 0x10) else if (pv->pending_ints & pv->reg[0] & 0x10)

2
pico/state.c
View file

@ -564,6 +564,8 @@ readend:
Pico.m.dirtyPal = 1; Pico.m.dirtyPal = 1;
Pico.video.status &= ~(SR_VB | SR_F); Pico.video.status &= ~(SR_VB | SR_F);
Pico.video.status |= ((Pico.video.reg[1] >> 3) ^ SR_VB) & SR_VB;
Pico.video.status |= (Pico.video.pending_ints << 2) & SR_F;
retval = 0; retval = 0;

45
pico/videoport.c
View file

@ -376,8 +376,7 @@ PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d)
pvid->pending=0; pvid->pending=0;
} }
// preliminary FIFO emulation for Chaos Engine, The (E) if (!(pvid->status & SR_VB) && !(PicoOpt&POPT_DIS_VDP_FIFO))
if (!(pvid->status & SR_VB) && (pvid->reg[1] & 0x40) && !(PicoOpt&POPT_DIS_VDP_FIFO)) // active display?
{ {
int use = pvid->type == 1 ? 2 : 1; int use = pvid->type == 1 ? 2 : 1;
pvid->lwrite_cnt -= use; pvid->lwrite_cnt -= use;
@ -434,6 +433,9 @@ PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d)
case 0x01: case 0x01:
elprintf(EL_INTSW, "vint_onoff: %i->%i [%u] pend=%i @ %06x", (dold&0x20)>>5, elprintf(EL_INTSW, "vint_onoff: %i->%i [%u] pend=%i @ %06x", (dold&0x20)>>5,
(d&0x20)>>5, SekCyclesDone(), (pvid->pending_ints&0x20)>>5, SekPc); (d&0x20)>>5, SekCyclesDone(), (pvid->pending_ints&0x20)>>5, SekPc);
if (!(pvid->status & PVS_VB2))
pvid->status &= ~SR_VB;
pvid->status |= ((d >> 3) ^ SR_VB) & SR_VB; // forced blanking
goto update_irq; goto update_irq;
case 0x05: case 0x05:
//elprintf(EL_STATUS, "spritep moved to %04x", (unsigned)(Pico.video.reg[5]&0x7f) << 9); //elprintf(EL_STATUS, "spritep moved to %04x", (unsigned)(Pico.video.reg[5]&0x7f) << 9);
@ -503,25 +505,25 @@ update_irq:
} }
} }
static u32 SrLow(const struct PicoVideo *pv)
{
unsigned int c, d = pv->status;
c = SekCyclesDone() - Pico.t.m68c_line_start - 39;
if (c < 92)
d |= SR_HB;
return d;
}
PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a) PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a)
{ {
a&=0x1c; a &= 0x1c;
if (a==0x04) // control port if (a == 0x04) // control port
{ {
struct PicoVideo *pv=&Pico.video; struct PicoVideo *pv = &Pico.video;
unsigned int d; unsigned int d = SrLow(pv);
d=pv->status; pv->pending = 0;
//if (PicoOpt&POPT_ALT_RENDERER) d|=0x0020; // sprite collision (Shadow of the Beast)
if (SekCyclesDone() - Pico.t.m68c_line_start >= 488-88)
d|=0x0004; // H-Blank (Sonic3 vs)
d |= ((pv->reg[1]&0x40)^0x40) >> 3; // set V-Blank if display is disabled
d |= (pv->pending_ints&0x20)<<2; // V-int pending?
if (d&0x100) pv->status&=~0x100; // FIFO no longer full
pv->pending = 0; // ctrl port reads clear write-pending flag (Charles MacDonald)
elprintf(EL_SR, "SR read: %04x [%u] @ %06x", d, SekCyclesDone(), SekPc); elprintf(EL_SR, "SR read: %04x [%u] @ %06x", d, SekCyclesDone(), SekPc);
return d; return d;
} }
@ -572,12 +574,9 @@ unsigned char PicoVideoRead8DataL(void)
return VideoRead(); return VideoRead();
} }
// FIXME: broken mess
unsigned char PicoVideoRead8CtlH(void) unsigned char PicoVideoRead8CtlH(void)
{ {
u8 d = (u8)(Pico.video.status >> 8); u8 d = (u8)(Pico.video.status >> 8);
if (d & 1)
Pico.video.status &= ~0x100; // FIFO no longer full
Pico.video.pending = 0; Pico.video.pending = 0;
elprintf(EL_SR, "SR read (h): %02x @ %06x", d, SekPc); elprintf(EL_SR, "SR read (h): %02x @ %06x", d, SekPc);
return d; return d;
@ -585,11 +584,7 @@ unsigned char PicoVideoRead8CtlH(void)
unsigned char PicoVideoRead8CtlL(void) unsigned char PicoVideoRead8CtlL(void)
{ {
u8 d = (u8)Pico.video.status; u8 d = SrLow(&Pico.video);
//if (PicoOpt&POPT_ALT_RENDERER) d|=0x0020; // sprite collision (Shadow of the Beast)
d |= ((Pico.video.reg[1]&0x40)^0x40) >> 3; // set V-Blank if display is disabled
d |= (Pico.video.pending_ints&0x20)<<2; // V-int pending?
if (SekCyclesDone() - Pico.t.m68c_line_start >= 488-88) d |= 4; // H-Blank
Pico.video.pending = 0; Pico.video.pending = 0;
elprintf(EL_SR, "SR read (l): %02x @ %06x", d, SekPc); elprintf(EL_SR, "SR read (l): %02x @ %06x", d, SekPc);
return d; return d;