mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
32x: sh2 irqs (irls), preliminary DMAC implementation
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@786 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz
parent
bca23c1c79
commit
4ea707e1e3
6 changed files with 335 additions and 83 deletions
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@ -10,15 +10,14 @@ static void bank_switch(int b);
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#define MSB8(x) ((x) >> 8)
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// poll detection
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#define POLL_THRESHOLD 6
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struct poll_det {
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int addr, pc, cnt;
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};
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static struct poll_det m68k_poll;
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static struct poll_det msh2_poll;
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static struct poll_det m68k_poll, msh2_poll;
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#define POLL_THRESHOLD 6
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static int poll_detect(struct poll_det *pd, u32 a, u32 pc, int flag)
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static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int flag)
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{
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int ret = 0;
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@ -41,7 +40,7 @@ static int poll_detect(struct poll_det *pd, u32 a, u32 pc, int flag)
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return ret;
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}
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static int poll_undetect(struct poll_det *pd, int flag)
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static int p32x_poll_undetect(struct poll_det *pd, int flag)
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{
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int ret = 0;
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if (pd->cnt > POLL_THRESHOLD)
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@ -51,6 +50,11 @@ static int poll_undetect(struct poll_det *pd, int flag)
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return ret;
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}
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void p32x_poll_event(int is_vdp)
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{
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p32x_poll_undetect(&msh2_poll, is_vdp ? P32XF_MSH2VPOLL : P32XF_MSH2POLL);
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}
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// SH2 faking
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#define FAKE_SH2
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int p32x_csum_faked;
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@ -80,6 +84,44 @@ static u32 sh2_comm_faker(u32 a)
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}
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#endif
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// DMAC handling
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static struct {
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unsigned int sar0, dar0, tcr0; // src addr, dst addr, transfer count
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unsigned int chcr0; // chan ctl
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unsigned int sar1, dar1, tcr1; // same for chan 1
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unsigned int chcr1;
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int pad[4];
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unsigned int dmaor;
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} * dmac0;
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static void dma_68k2sh2_do(void)
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{
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unsigned short *dreqlen = &Pico32x.regs[0x10 / 2];
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int i;
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if (dmac0->tcr0 != *dreqlen)
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elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen);
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for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) {
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extern void p32x_sh2_write16(u32 a, u32 d);
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elprintf(EL_32X|EL_ANOMALY, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen);
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p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i]);
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dmac0->dar0 += 2;
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dmac0->tcr0--;
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(*dreqlen)--;
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}
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Pico32x.dmac_ptr = 0; // HACK
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Pico32x.regs[6 / 2] &= ~P32XS_FULL;
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if (*dreqlen == 0)
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Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete
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if (dmac0->tcr0 == 0)
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dmac0->chcr0 |= 2; // DMA has ended normally
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p32x_poll_undetect(&m68k_poll, P32XF_68KPOLL);
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}
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// ------------------------------------------------------------------
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static u32 p32x_reg_read16(u32 a)
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{
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a &= 0x3e;
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@ -88,8 +130,7 @@ static u32 p32x_reg_read16(u32 a)
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if ((a & 0x30) == 0x20)
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return sh2_comm_faker(a);
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#else
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if (poll_detect(&m68k_poll, a, SekPc, P32XF_68KPOLL)) {
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SekSetStop(1);
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if (p32x_poll_detect(&m68k_poll, a, SekPc, P32XF_68KPOLL)) {
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SekEndRun(16);
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}
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#endif
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@ -117,16 +158,25 @@ static void p32x_reg_write8(u32 a, u32 d)
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return;
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switch (a) {
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case 0:
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case 0: // adapter ctl
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r[0] = (r[0] & 0x83) | ((d << 8) & P32XS_FM);
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break;
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case 5:
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case 3: // irq ctl
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if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) {
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Pico32x.sh2irqi[0] |= P32XI_CMD;
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p32x_update_irls();
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}
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break;
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case 5: // bank
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d &= 7;
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if (r[4/2] != d) {
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r[4/2] = d;
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if (r[4 / 2] != d) {
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r[4 / 2] = d;
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bank_switch(d);
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}
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break;
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case 7: // DREQ ctl
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r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_RV));
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break;
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}
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}
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@ -135,15 +185,40 @@ static void p32x_reg_write16(u32 a, u32 d)
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u16 *r = Pico32x.regs;
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a &= 0x3e;
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// for write loops with FIFO checks..
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m68k_poll.cnt = 0;
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switch (a) {
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case 0:
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case 0x00: // adapter ctl
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r[0] = (r[0] & 0x83) | (d & P32XS_FM);
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return;
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case 0x10: // DREQ len
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r[a / 2] = d & ~3;
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return;
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case 0x12: // FIFO reg
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if (!(r[6 / 2] & P32XS_68S)) {
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elprintf(EL_32X|EL_ANOMALY, "DREQ FIFO w16 without 68S?");
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return;
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}
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if (Pico32x.dmac_ptr < DMAC_FIFO_LEN) {
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Pico32x.dmac_fifo[Pico32x.dmac_ptr++] = d;
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if ((Pico32x.dmac_ptr & 3) == 0 && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1))
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dma_68k2sh2_do();
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if (Pico32x.dmac_ptr == DMAC_FIFO_LEN)
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r[6 / 2] |= P32XS_FULL;
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}
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break;
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}
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if ((a & 0x30) == 0x20 && r[a / 2] != d) {
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// DREQ src, dst
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if ((a & 0x38) == 0x08) {
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r[a / 2] = d;
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if (poll_undetect(&msh2_poll, P32XF_MSH2POLL))
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return;
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}
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// comm port
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else if ((a & 0x30) == 0x20 && r[a / 2] != d) {
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r[a / 2] = d;
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if (p32x_poll_undetect(&msh2_poll, P32XF_MSH2POLL))
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// if SH2 is busy waiting, it needs to see the result ASAP
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SekEndRun(16);
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return;
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@ -152,6 +227,7 @@ static void p32x_reg_write16(u32 a, u32 d)
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p32x_reg_write8(a + 1, d);
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}
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// ------------------------------------------------------------------
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// VDP regs
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static u32 p32x_vdp_read16(u32 a)
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{
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@ -165,15 +241,12 @@ static void p32x_vdp_write8(u32 a, u32 d)
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u16 *r = Pico32x.vdp_regs;
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a &= 0x0f;
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// for FEN checks between writes
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msh2_poll.cnt = 0;
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// TODO: verify what's writeable
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switch (a) {
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case 0x01:
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if (((r[0] & 3) == 0) != ((d & 3) == 0)) { // forced blanking changed
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if (Pico.video.status & 8)
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r[0x0a/2] |= P32XV_VBLK;
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else
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r[0x0a/2] &= ~P32XV_VBLK;
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}
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// priority inversion is handled in palette
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if ((r[0] ^ d) & P32XV_PRI)
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Pico32x.dirty_pal = 1;
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@ -183,7 +256,7 @@ static void p32x_vdp_write8(u32 a, u32 d)
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d &= 1;
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Pico32x.pending_fb = d;
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// if we are blanking and FS bit is changing
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if ((r[0x0a/2] & P32XV_VBLK) && ((r[0x0a/2] ^ d) & P32XV_FS)) {
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if (((r[0x0a/2] & P32XV_VBLK) || (r[0] & P32XV_Mx) == 0) && ((r[0x0a/2] ^ d) & P32XV_FS)) {
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r[0x0a/2] ^= 1;
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Pico32xSwapDRAM(d ^ 1);
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elprintf(EL_32X, "VDP FS: %d", r[0x0a/2] & P32XV_FS);
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@ -197,43 +270,93 @@ static void p32x_vdp_write16(u32 a, u32 d)
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p32x_vdp_write8(a | 1, d);
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}
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// ------------------------------------------------------------------
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// SH2 regs
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static u32 p32x_sh2reg_read16(u32 a)
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{
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a &= 0xff; // ?
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u16 *r = Pico32x.regs;
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a &= 0xfe; // ?
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if (poll_detect(&msh2_poll, a, ash2_pc(), P32XF_MSH2POLL))
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ash2_end_run(8);
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if (a == 0) {
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return (Pico32x.regs[0] & P32XS_FM) | P32XS2_ADEN;
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switch (a) {
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case 0x00: // adapter/irq ctl
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return (r[0] & P32XS_FM) | P32XS2_ADEN | Pico32x.sh2irq_mask[0];
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case 0x10: // DREQ len
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return r[a / 2];
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}
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if ((a & 0x30) == 0x20)
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return Pico32x.regs[a / 2];
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// DREQ src, dst; comm port
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if ((a & 0x38) == 0x08 || (a & 0x30) == 0x20)
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return r[a / 2];
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return 0;
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}
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static void p32x_sh2reg_write8(u32 a, u32 d)
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{
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a &= 0xff;
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if (a == 1) {
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Pico32x.sh2irq_mask[0] = d & 0x0f;
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p32x_update_irls();
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}
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}
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static void p32x_sh2reg_write16(u32 a, u32 d)
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{
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a &= 0xff;
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a &= 0xfe;
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if ((a & 0x30) == 0x20) {
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if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) {
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Pico32x.regs[a/2] = d;
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if (poll_undetect(&m68k_poll, P32XF_68KPOLL))
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// dangerous, but let's just assume 68k program
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// didn't issue STOP itself.
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SekSetStop(0);
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p32x_poll_undetect(&m68k_poll, P32XF_68KPOLL);
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return;
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}
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switch (a) {
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case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls;
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case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls;
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case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls;
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case 0x1a: Pico32x.sh2irqi[0] &= ~P32XI_CMD; goto irls;
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case 0x1c: Pico32x.sh2irqs &= ~P32XI_PWM; goto irls;
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}
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p32x_sh2reg_write8(a | 1, d);
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return;
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irls:
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p32x_update_irls();
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}
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static u32 sh2_peripheral_read(u32 a)
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{
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u32 d;
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a &= 0x1fc;
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d = Pico32xMem->sh2_peri_regs[0][a / 4];
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elprintf(EL_32X, "sh2 peri r32 [%08x] %08x @%06x", a, d, ash2_pc());
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return d;
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}
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static void sh2_peripheral_write(u32 a, u32 d)
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{
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unsigned int *r = Pico32xMem->sh2_peri_regs[0];
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elprintf(EL_32X, "sh2 peri w32 [%08x] %08x @%06x", a, d, ash2_pc());
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a &= 0x1fc;
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r[a / 4] = d;
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if ((a == 0x1b0 || a == 0x18c) && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) {
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elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x",
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dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, ash2_pc());
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dmac0->tcr0 &= 0xffffff;
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// DREQ is only sent after first 4 words are written.
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// we do multiple of 4 words to avoid messing up alignment
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if (dmac0->sar0 == 0x20004012 && Pico32x.dmac_ptr && (Pico32x.dmac_ptr & 3) == 0) {
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elprintf(EL_32X, "68k -> sh2 DMA");
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dma_68k2sh2_do();
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}
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}
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}
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// ------------------------------------------------------------------
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// default 32x handlers
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u32 PicoRead8_32x(u32 a)
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{
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@ -423,9 +546,11 @@ static void bank_switch(int b)
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// SH2
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// -----------------------------------------------------------------
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u32 pico32x_read8(u32 a)
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u32 p32x_sh2_read8(u32 a)
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{
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int pd = 0;
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u32 d = 0;
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if (a < sizeof(Pico32xMem->sh2_rom_m))
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return Pico32xMem->sh2_rom_m[a ^ 1];
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@ -438,12 +563,14 @@ u32 pico32x_read8(u32 a)
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if ((a & 0x0fffff00) == 0x4000) {
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d = p32x_sh2reg_read16(a);
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goto out_16to8;
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pd = P32XF_MSH2POLL;
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goto out_pd;
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}
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if ((a & 0x0fffff00) == 0x4100) {
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d = p32x_vdp_read16(a);
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goto out_16to8;
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pd = P32XF_MSH2VPOLL;
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goto out_pd;
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}
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if ((a & 0x0fffff00) == 0x4200) {
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@ -454,6 +581,10 @@ u32 pico32x_read8(u32 a)
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elprintf(EL_UIO, "sh2 unmapped r8 [%08x] %02x @%06x", a, d, ash2_pc());
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return d;
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out_pd:
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if (p32x_poll_detect(&msh2_poll, a, ash2_pc(), pd))
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ash2_end_run(8);
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out_16to8:
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if (a & 1)
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d &= 0xff;
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@ -464,8 +595,9 @@ out_16to8:
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return d;
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}
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u32 pico32x_read16(u32 a)
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u32 p32x_sh2_read16(u32 a)
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{
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int pd = 0;
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u32 d = 0;
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if (a < sizeof(Pico32xMem->sh2_rom_m))
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@ -480,12 +612,14 @@ u32 pico32x_read16(u32 a)
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if ((a & 0x0fffff00) == 0x4000) {
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d = p32x_sh2reg_read16(a);
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goto out;
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pd = P32XF_MSH2POLL;
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goto out_pd;
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}
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if ((a & 0x0fffff00) == 0x4100) {
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d = p32x_vdp_read16(a);
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goto out;
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pd = P32XF_MSH2VPOLL;
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goto out_pd;
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}
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if ((a & 0x0fffff00) == 0x4200) {
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@ -496,18 +630,25 @@ u32 pico32x_read16(u32 a)
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elprintf(EL_UIO, "sh2 unmapped r16 [%08x] %04x @%06x", a, d, ash2_pc());
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return d;
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out_pd:
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if (p32x_poll_detect(&msh2_poll, a, ash2_pc(), pd))
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ash2_end_run(8);
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out:
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elprintf(EL_32X, "sh2 r16 [%08x] %04x @%06x", a, d, ash2_pc());
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return d;
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}
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u32 pico32x_read32(u32 a)
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u32 p32x_sh2_read32(u32 a)
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{
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if ((a & 0xfffffe00) == 0xfffffe00)
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return sh2_peripheral_read(a);
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// elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc());
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return (pico32x_read16(a) << 16) | pico32x_read16(a + 2);
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return (p32x_sh2_read16(a) << 16) | p32x_sh2_read16(a + 2);
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}
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void pico32x_write8(u32 a, u32 d)
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void p32x_sh2_write8(u32 a, u32 d)
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{
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if ((a & 0x0ffffc00) == 0x4000)
|
||||
elprintf(EL_32X, "sh2 w8 [%08x] %02x @%06x", a, d & 0xff, ash2_pc());
|
||||
|
|
@ -536,7 +677,7 @@ void pico32x_write8(u32 a, u32 d)
|
|||
elprintf(EL_UIO, "sh2 unmapped w8 [%08x] %02x @%06x", a, d & 0xff, ash2_pc());
|
||||
}
|
||||
|
||||
void pico32x_write16(u32 a, u32 d)
|
||||
void p32x_sh2_write16(u32 a, u32 d)
|
||||
{
|
||||
if ((a & 0x0ffffc00) == 0x4000)
|
||||
elprintf(EL_32X, "sh2 w16 [%08x] %04x @%06x", a, d & 0xffff, ash2_pc());
|
||||
|
|
@ -570,11 +711,16 @@ void pico32x_write16(u32 a, u32 d)
|
|||
elprintf(EL_UIO, "sh2 unmapped w16 [%08x] %04x @%06x", a, d & 0xffff, ash2_pc());
|
||||
}
|
||||
|
||||
void pico32x_write32(u32 a, u32 d)
|
||||
void p32x_sh2_write32(u32 a, u32 d)
|
||||
{
|
||||
if ((a & 0xfffffe00) == 0xfffffe00) {
|
||||
sh2_peripheral_write(a, d);
|
||||
return;
|
||||
}
|
||||
|
||||
// elprintf(EL_UIO, "sh2 w32 [%08x] %08x @%06x", a, d, ash2_pc());
|
||||
pico32x_write16(a, d >> 16);
|
||||
pico32x_write16(a + 2, d);
|
||||
p32x_sh2_write16(a, d >> 16);
|
||||
p32x_sh2_write16(a + 2, d);
|
||||
}
|
||||
|
||||
#define HWSWAP(x) (((x) << 16) | ((x) >> 16))
|
||||
|
|
@ -591,6 +737,8 @@ void PicoMemSetup32x(void)
|
|||
return;
|
||||
}
|
||||
|
||||
dmac0 = (void *)&Pico32xMem->sh2_peri_regs[0][0x180 / 4];
|
||||
|
||||
// generate 68k ROM
|
||||
ps = (unsigned short *)Pico32xMem->m68k_rom;
|
||||
pl = (unsigned int *)Pico32xMem->m68k_rom;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue