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overhaul of translation cache and sh2 literals handling

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This commit is contained in:
kub 2019-04-05 21:01:03 +02:00
parent d760c90f3a
commit f133766faa
4 changed files with 525 additions and 364 deletions
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859
cpu/sh2/compiler.c
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File diff suppressed because it is too large Load diff

12
cpu/sh2/compiler.h
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@ -24,7 +24,7 @@ void sh2_drc_frame(void);
void scan_block(unsigned int base_pc, int is_slave, void scan_block(unsigned int base_pc, int is_slave,
unsigned char *op_flags, unsigned int *end_pc, unsigned char *op_flags, unsigned int *end_pc,
unsigned int *end_literals); unsigned int *base_literals, unsigned int *end_literals);
#if defined(DRC_SH2) #if defined(DRC_SH2)
// direct access to some host CPU registers used by the DRC // direct access to some host CPU registers used by the DRC
@ -39,13 +39,15 @@ void scan_block(unsigned int base_pc, int is_slave,
#warning "direct DRC register access not available for this host" #warning "direct DRC register access not available for this host"
#endif #endif
#ifdef DCR_SR_REG #ifdef DRC_SR_REG
#define DRC_DECLARE_SR register int sh2_sr asm(#DCR_SR_REG) #define __DRC_DECLARE_SR(SR) register int sh2_sr asm(#SR)
#define _DRC_DECLARE_SR(SR) __DRC_DECLARE_SR(SR)
#define DRC_DECLARE_SR _DRC_DECLARE_SR(DRC_SR_REG)
#define DRC_SAVE_SR(sh2) \ #define DRC_SAVE_SR(sh2) \
if ((sh2->state & (SH2_STATE_RUN|SH2_STATE_BUSY)) == SH2_STATE_RUN) \ if ((sh2->state & (SH2_STATE_RUN)) == SH2_STATE_RUN) \
sh2->sr = sh2_sr; sh2->sr = sh2_sr;
#define DRC_RESTORE_SR(sh2) \ #define DRC_RESTORE_SR(sh2) \
if ((sh2->state & (SH2_STATE_RUN|SH2_STATE_BUSY)) == SH2_STATE_RUN) \ if ((sh2->state & (SH2_STATE_RUN)) == SH2_STATE_RUN) \
sh2_sr = sh2->sr; sh2_sr = sh2->sr;
#else #else
#define DRC_DECLARE_SR #define DRC_DECLARE_SR

12
pico/32x/memory.c
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@ -1432,7 +1432,7 @@ static void REGPARM(3) sh2_write8_sdram(u32 a, u32 d, SH2 *sh2)
{ {
u32 a1 = a & 0x3ffff; u32 a1 = a & 0x3ffff;
#ifdef DRC_SH2 #ifdef DRC_SH2
u16 *p = sh2->p_drcblk_ram; u8 *p = sh2->p_drcblk_ram;
int t = p[a1 >> SH2_DRCBLK_RAM_SHIFT]; int t = p[a1 >> SH2_DRCBLK_RAM_SHIFT];
if (t) if (t)
sh2_drc_wcheck_ram(a, t, sh2); sh2_drc_wcheck_ram(a, t, sh2);
@ -1456,7 +1456,7 @@ static void REGPARM(3) sh2_write8_da(u32 a, u32 d, SH2 *sh2)
{ {
u32 a1 = a & 0xfff; u32 a1 = a & 0xfff;
#ifdef DRC_SH2 #ifdef DRC_SH2
u16 *p = sh2->p_drcblk_da; u8 *p = sh2->p_drcblk_da;
int t = p[a1 >> SH2_DRCBLK_DA_SHIFT]; int t = p[a1 >> SH2_DRCBLK_DA_SHIFT];
if (t) if (t)
sh2_drc_wcheck_da(a, t, sh2); sh2_drc_wcheck_da(a, t, sh2);
@ -1511,7 +1511,7 @@ static void REGPARM(3) sh2_write16_sdram(u32 a, u32 d, SH2 *sh2)
{ {
u32 a1 = a & 0x3fffe; u32 a1 = a & 0x3fffe;
#ifdef DRC_SH2 #ifdef DRC_SH2
u16 *p = sh2->p_drcblk_ram; u8 *p = sh2->p_drcblk_ram;
int t = p[a1 >> SH2_DRCBLK_RAM_SHIFT]; int t = p[a1 >> SH2_DRCBLK_RAM_SHIFT];
if (t) if (t)
sh2_drc_wcheck_ram(a, t, sh2); sh2_drc_wcheck_ram(a, t, sh2);
@ -1523,7 +1523,7 @@ static void REGPARM(3) sh2_write16_da(u32 a, u32 d, SH2 *sh2)
{ {
u32 a1 = a & 0xffe; u32 a1 = a & 0xffe;
#ifdef DRC_SH2 #ifdef DRC_SH2
u16 *p = sh2->p_drcblk_da; u8 *p = sh2->p_drcblk_da;
int t = p[a1 >> SH2_DRCBLK_DA_SHIFT]; int t = p[a1 >> SH2_DRCBLK_DA_SHIFT];
if (t) if (t)
sh2_drc_wcheck_da(a, t, sh2); sh2_drc_wcheck_da(a, t, sh2);
@ -1580,7 +1580,7 @@ static void REGPARM(3) sh2_write32_sdram(u32 a, u32 d, SH2 *sh2)
{ {
u32 a1 = a & 0x3fffc; u32 a1 = a & 0x3fffc;
#ifdef DRC_SH2 #ifdef DRC_SH2
u16 *p = sh2->p_drcblk_ram; u8 *p = sh2->p_drcblk_ram;
int t = p[a1 >> SH2_DRCBLK_RAM_SHIFT]; int t = p[a1 >> SH2_DRCBLK_RAM_SHIFT];
if (t) if (t)
sh2_drc_wcheck_ram(a, t, sh2); sh2_drc_wcheck_ram(a, t, sh2);
@ -1595,7 +1595,7 @@ static void REGPARM(3) sh2_write32_da(u32 a, u32 d, SH2 *sh2)
{ {
u32 a1 = a & 0xffc; u32 a1 = a & 0xffc;
#ifdef DRC_SH2 #ifdef DRC_SH2
u16 *p = sh2->p_drcblk_da; u8 *p = sh2->p_drcblk_da;
int t = p[a1 >> SH2_DRCBLK_DA_SHIFT]; int t = p[a1 >> SH2_DRCBLK_DA_SHIFT];
if (t) if (t)
sh2_drc_wcheck_da(a, t, sh2); sh2_drc_wcheck_da(a, t, sh2);

6
pico/pico_int.h
View file

@ -599,7 +599,8 @@ struct Pico32xMem
{ {
unsigned char sdram[0x40000]; unsigned char sdram[0x40000];
#ifdef DRC_SH2 #ifdef DRC_SH2
unsigned short drcblk_ram[1 << (18 - SH2_DRCBLK_RAM_SHIFT)]; unsigned char drcblk_ram[1 << (18 - SH2_DRCBLK_RAM_SHIFT)];
unsigned char drclit_ram[1 << (18 - SH2_DRCBLK_RAM_SHIFT)];
#endif #endif
unsigned short dram[2][0x20000/2]; // AKA fb unsigned short dram[2][0x20000/2]; // AKA fb
union { union {
@ -607,7 +608,8 @@ struct Pico32xMem
unsigned char m68k_rom_bank[0x10000]; // M68K_BANK_SIZE unsigned char m68k_rom_bank[0x10000]; // M68K_BANK_SIZE
}; };
#ifdef DRC_SH2 #ifdef DRC_SH2
unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)]; unsigned char drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];
unsigned char drclit_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];
#endif #endif
union { union {
unsigned char b[0x800]; unsigned char b[0x800];