more wip SVP code

git-svn-id: file:///home/notaz/opt/svn/PicoDrive@318 be3aeb3a-fb24-0410-a615-afba39da0efa

Pico/Cart.c

@@ -481,7 +481,7 @@ int PicoCartLoad(pm_file *f,unsigned char **prom,unsigned int *psize)
   return 0;
 }
 
-// Insert/remove a cartridge:
+// Insert a cartridge:
 int PicoCartInsert(unsigned char *rom,unsigned int romsize)
 {
   // notaz: add a 68k "jump one op back" opcode to the end of ROM.
@@ -493,15 +493,19 @@ int PicoCartInsert(unsigned char *rom,unsigned int romsize)
   Pico.rom=rom;
   Pico.romsize=romsize;
 
+  PicoMemResetHooks();
+  PicoDmaHook = NULL;
+  PicoResetHook = NULL;
+
+  if (!(PicoMCD & 1))
+    PicoCartDetect();
+
   // setup correct memory map for loaded ROM
   if (PicoMCD & 1)
        PicoMemSetupCD();
   else PicoMemSetup();
   PicoMemReset();
 
-  if (!(PicoMCD & 1))
-    PicoCartDetect();
-
   return PicoReset(1);
 }
 
@@ -637,8 +641,6 @@ void PicoCartDetect(void)
   if (name_cmp("Virtua Racing") == 0)
   {
     PicoSVPInit();
-    PicoRead16Hook = PicoSVPRead16;
-    PicoWrite8Hook = PicoSVPWrite8;
   }
 }
 

Pico/Memory.c

@@ -317,7 +317,6 @@ static void OtherWrite8End(u32 a,u32 d,int realsize)
     Pico.m.prot_bytes[(a>>2)&1] = (u8)d;
 }
 
-
 #include "MemoryCmn.c"
 
 
@@ -498,15 +497,26 @@ static void PicoWrite32(u32 a,u32 d)
 // -----------------------------------------------------------------
 
 // TODO: asm code
-u32  (*PicoRead16Hook)(u32 a, int realsize) = OtherRead16End;
+static void OtherWrite16End(u32 a,u32 d,int realsize)
-void (*PicoWrite8Hook)(u32 a, u32 d, int realsize) = OtherWrite8End;
+{
+  PicoWrite8Hook(a,  d>>8, realsize);
+  PicoWrite8Hook(a+1,d&0xff, realsize);
+}
 
-PICO_INTERNAL void PicoMemSetup(void)
+u32  (*PicoRead16Hook) (u32 a, int realsize) = OtherRead16End;
+void (*PicoWrite8Hook) (u32 a, u32 d, int realsize) = OtherWrite8End;
+void (*PicoWrite16Hook)(u32 a, u32 d, int realsize) = OtherWrite16End;
+
+PICO_INTERNAL void PicoMemResetHooks(void)
 {
   // default unmapped/cart specific handlers
   PicoRead16Hook = OtherRead16End;
   PicoWrite8Hook = OtherWrite8End;
+  PicoWrite16Hook = OtherWrite16End;
+}
 
+PICO_INTERNAL void PicoMemSetup(void)
+{
   // Setup memory callbacks:
 #ifdef EMU_C68K
   PicoCpuCM68k.checkpc=PicoCheckPc;

Pico/MemoryCmn.c

@@ -229,8 +229,6 @@ void OtherWrite16(u32 a,u32 d)
   }
 #endif
 
-  PicoWrite8Hook(a,  d>>8, 16);
+  PicoWrite16Hook(a, d, 16);
-  PicoWrite8Hook(a+1,d&0xff, 16);
 }
 
-

Pico/Pico.c

@@ -17,7 +17,8 @@ int PicoSkipFrame=0; // skip rendering frame?
 int PicoRegionOverride = 0; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe
 int PicoAutoRgnOrder = 0;
 int emustatus = 0; // rapid_ym2612, multi_ym_updates
-void (*PicoWriteSound)(int len) = 0; // called once per frame at the best time to send sound buffer (PsndOut) to hardware
+void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware
+void (*PicoResetHook)(void) = NULL;
 
 struct PicoSRAM SRam = {0,};
 int z80startCycle, z80stopCycle; // in 68k cycles
@@ -139,6 +140,8 @@ int PicoReset(int hard)
 
   PsndReset(); // pal must be known here
 
+  if (PicoResetHook) PicoResetHook();
+
   if (PicoMCD & 1) {
     PicoResetMCD(hard);
     return 0;

Pico/PicoInt.h

@@ -385,6 +385,7 @@ PICO_INTERNAL int PicoInitPc(unsigned int pc);
 PICO_INTERNAL_ASM unsigned int PicoRead32(unsigned int a);
 PICO_INTERNAL void PicoMemSetup(void);
 PICO_INTERNAL_ASM void PicoMemReset(void);
+PICO_INTERNAL void PicoMemResetHooks(void);
 PICO_INTERNAL int PadRead(int i);
 PICO_INTERNAL unsigned char z80_read(unsigned short a);
 #ifndef _USE_CZ80
@@ -395,7 +396,8 @@ PICO_INTERNAL unsigned short z80_read16(unsigned short a);
 PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data);
 #endif
 extern unsigned int (*PicoRead16Hook)(unsigned int a, int realsize);
-extern void (*PicoWrite8Hook)(unsigned int a,unsigned int d,int realsize);
+extern void (*PicoWrite8Hook) (unsigned int a,unsigned int d,int realsize);
+extern void (*PicoWrite16Hook)(unsigned int a,unsigned int d,int realsize);
 
 // cd/Memory.c
 PICO_INTERNAL void PicoMemSetupCD(void);
@@ -407,6 +409,7 @@ extern struct Pico Pico;
 extern struct PicoSRAM SRam;
 extern int emustatus;
 extern int z80startCycle, z80stopCycle; // in 68k cycles
+extern void (*PicoResetHook)(void);
 PICO_INTERNAL int CheckDMA(void);
 
 // cd/Pico.c
@@ -433,6 +436,7 @@ extern int PsndLen_exc_add;
 // VideoPort.c
 PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d);
 PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a);
+extern int (*PicoDmaHook)(unsigned int source, unsigned short **srcp, unsigned short **limitp);
 
 // Misc.c
 PICO_INTERNAL void SRAMWriteEEPROM(unsigned int d);

Pico/VideoPort.c

@@ -22,6 +22,7 @@ typedef unsigned int   u32;
 #define UTYPES_DEFINED
 #endif
 
+int (*PicoDmaHook)(unsigned int source, unsigned short **srcp, unsigned short **limitp) = NULL;
 
 static __inline void AutoIncrement(void)
 {
@@ -104,7 +105,7 @@ static void DmaSlow(int len)
   if ((source&0xe00000)==0xe00000) { // Ram
     pd=(u16 *)(Pico.ram+(source&0xfffe));
     pdend=(u16 *)(Pico.ram+0x10000);
-  } else if(PicoMCD & 1) {
+  } else if (PicoMCD & 1) {
     elprintf(EL_VDPDMA, "DmaSlow CD, r3=%02x", Pico_mcd->s68k_regs[3]);
     if(source<0x20000) { // Bios area
       pd=(u16 *)(Pico_mcd->bios+(source&~1));
@@ -133,10 +134,12 @@ static void DmaSlow(int len)
       return;
     }
   } else {
-    if(source<Pico.romsize) { // Rom
+    if (source<Pico.romsize) { // Rom
       pd=(u16 *)(Pico.rom+(source&~1));
       pdend=(u16 *)(Pico.rom+Pico.romsize);
-    } else {
+    }
+    else if (PicoDmaHook && PicoDmaHook(source, &pd, &pdend));
+    else {
       elprintf(EL_VDPDMA|EL_ANOMALY, "DmaSlow[%i] %06x->%04x: invalid src", Pico.video.type, source, a);
       return;
     }

Pico/carthw/carthw.h

@@ -1,8 +1,21 @@
 
-
 /* svp */
+#include "svp/ssp16.h"
+
+typedef struct {
+	unsigned char ram[0x20000];
+	// TODO: IRAM?
+	ssp1601_t ssp1601;
+} svp_t;
+
+extern svp_t *svp;
+
 void PicoSVPInit(void);
+void PicoSVPReset(void);
 
 unsigned int PicoSVPRead16(unsigned int a, int realsize);
-void PicoSVPWrite8(unsigned int a,unsigned int d,int realsize);
+void PicoSVPWrite8 (unsigned int a, unsigned int d, int realsize);
+void PicoSVPWrite16(unsigned int a, unsigned int d, int realsize);
+
+int PicoSVPDma(unsigned int source, unsigned short **srcp, unsigned short **limitp);
 

Pico/carthw/svp/Memory.c

@@ -1,16 +1,53 @@
 #include "../../PicoInt.h"
 
+#ifndef UTYPES_DEFINED
+typedef unsigned char  u8;
+typedef unsigned short u16;
+typedef unsigned int   u32;
+#define UTYPES_DEFINED
+#endif
+
+#define CLEAR_DETECT(pc_start,pc_end,text) \
+  if (d == 0 && SekPc >= pc_start && SekPc < pc_end) \
+  { \
+    if (!clearing_ram) \
+      elprintf(EL_UIO, text); \
+    clearing_ram = 1; \
+    return; \
+  }
+
 unsigned int PicoSVPRead16(unsigned int a, int realsize)
 {
   unsigned int d = 0;
 
+  if ((a & 0xfe0000) == 0x300000)
+    *(u16 *)(svp->ram + (a&0x1fffe)) = d;
+
   elprintf(EL_UIO, "SVP r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);
 
+  // if (a == 0x30fe02) d = 1;
+
   return d;
 }
 
 void PicoSVPWrite8(unsigned int a, unsigned int d, int realsize)
 {
-  elprintf(EL_UIO, "SVP w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
+  elprintf(EL_UIO, "!!! SVP w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);
+}
+
+void PicoSVPWrite16(unsigned int a, unsigned int d, int realsize)
+{
+  static int clearing_ram = 0;
+
+  if ((a & 0xfe0000) == 0x300000)
+    *(u16 *)(svp->ram + (a&0x1fffe)) = d;
+
+  // debug: detect RAM clears..
+  CLEAR_DETECT(0x0221dc, 0x0221f0, "SVP RAM CLEAR (1)");
+  CLEAR_DETECT(0x02204c, 0x022068, "SVP RAM CLEAR (2)");
+  CLEAR_DETECT(0x021900, 0x021ff0, "SVP RAM CLEAR 300000-305fff");
+  clearing_ram = 0;
+
+  elprintf(EL_UIO, "SVP w%i: [%06x], %04x @%06x", realsize, a&0xffffff, d, SekPc);
 }
 

Pico/carthw/svp/ssp16.c

@@ -0,0 +1,215 @@
+// basic, incomplete SSP160x (SSP1601?) interpreter
+
+/*
+ * Register info
+ * most names taken from MAME code
+ *
+ * 0. "-"
+ *   size: 16
+ *   desc: Constant register with all bits set (0xffff).
+ *
+ * 1. "X"
+ *   size: 16
+ *   desc: Generic register. When set, updates P (P = X * Y * 2) ??
+ *
+ * 2. "Y"
+ *   size: 16
+ *   desc: Generic register. When set, updates P (P = X * Y * 2) ??
+ *
+ * 3. "A"
+ *   size: 32
+ *   desc: Accumulator.
+ *
+ * 4. "ST"
+ *   size: 16
+ *   desc: Status register. From MAME: bits 0-9 are CONTROL, other FLAG
+ *     fedc ba98 7654 3210
+ *       210 - RPL (?)       (e: "loop size", fir16_32.sc)
+ *       43  - RB (?)
+ *       5   - GP0_0 (ST5?)  Changed before acessing AL (affects banking?).
+ *       6   - GP0_1 (ST6?)  Cleared before acessing AL (affects banking?). Set after.
+ *       7   - IE (?)        Not used by SVP code (never set, but preserved)?
+ *       8   - OP (?)        Not used by SVP code (only cleared)?
+ *       9   - MACS (?)      Not used by SVP code (only cleared)? (e: "mac shift")
+ *       a   - GPI_0         Interrupt 0 enable/status?
+ *       b   - GPI_1         Interrupt 1 enable/status?
+ *       c   - L             L flag. Carry?
+ *       d   - Z             Zero flag.
+ *       e   - OV            Overflow flag.
+ *       f   - N             Negative flag.
+ *     seen directly changing code sequences:
+ *       ldi ST, 0      ld  A, ST     ld  A, ST     ld  A, ST     ldi st, 20h
+ *       ldi ST, 60h    ori A, 60h    and A, E8h    and A, E8h
+ *                      ld  ST, A     ld  ST, A     ori 3
+ *                                                  ld  ST, A
+ *
+ * 5. "STACK"
+ *   size: 16
+ *   desc: hw stack of 6 levels (according to datasheet)
+ *
+ * 6. "PC"
+ *   size: 16
+ *   desc: Program counter.
+ *
+ * 7. "P"
+ *   size: 32
+ *   desc: multiply result register. Updated after mp* instructions,
+ *         or writes to X or Y (P = X * Y * 2) ??
+ *         probably affected by MACS bit in ST.
+ *
+ * 8. "PM0" (PM from PMAR name from Tasco's docs)
+ *   size: 16?
+ *   desc: Programmable Memory access register.
+ *         On reset, or when one (both?) GP0 bits are clear,
+ *         acts as some additional status reg?
+ *
+ * 9. "PM1"
+ *   size: 16?
+ *   desc: Programmable Memory access register.
+ *         This reg. is only used as PMAR.
+ *
+ * 10. "PM2"
+ *   size: 16?
+ *   desc: Programmable Memory access register.
+ *         This reg. is only used as PMAR.
+ *
+ * 11. "XST"
+ *   size: 16?
+ *   desc: eXternal STate. Mapped to a15000 at 68k side.
+ *         Can be programmed as PMAR? (only seen in test mode code)
+ *
+ * 12. "PM4"
+ *   size: 16?
+ *   desc: Programmable Memory access register.
+ *         This reg. is only used as PMAR. The most used PMAR by VR.
+ *
+ * 13. (unused by VR)
+ *
+ * 14. "PMC" (PMC from PMAC name from Tasco's docs)
+ *   size: 32?
+ *   desc: Programmable Memory access Control. Set using 2 16bit writes,
+ *         first address, then mode word. After setting PMAC, PMAR sould
+ *         be accessed to program it.
+ *
+ * 15. "AL"
+ *   size: 16
+ *   desc: Accumulator Low. 16 least significant bits of accumulator (not 100% sure)
+ *         (normally reading acc (ld X, A) you get 16 most significant bits).
+ *
+ *
+ * There are 8 8-bit pointer registers rX. r0-r3 (ri) point to RAM0, r4-r7 (rj) point to RAM1.
+ * They can be accessed directly, or 2 indirection levels can be used [ (r0), ((r0)) ],
+ * which work similar to * and ** operators in C.
+ *
+ * r0,r1,r2,r4,r5,r6 can be modified [ex: ldi r0, 5].
+ * 3 modifiers can be applied (optional):
+ *  + : post-increment [ex: ld a, (r0+) ]
+ *  - : post-decrement
+ *  +!: same as '+' ???
+ *
+ * r3 and r7 are special and can not be changed (at least Samsung samples and SVP code never do).
+ * They are fixed to the start of their RAM banks. (They are probably changeable for ssp1605+,
+ * Samsung's old DSP page claims that).
+ * 1 of these 4 modifiers must be used (short form direct addressing?):
+ *  |00: RAMx[0] [ex: (r3|00), 0] (based on sample code)
+ *  |01: RAMx[1]
+ *  |10: RAMx[2] ? maybe 10h? accortding to Div_c_dp.sc, 2
+ *  |11: RAMx[3]
+ *
+ *
+ * Instruction notes
+ *
+ * mld (rj), (ri) [, b]
+ *   operation: A = 0; P = (rj) * (ri)
+ *   notes: based on IIR_4B.SC sample. flags? what is b???
+ *   TODO: figure out if (rj) and (ri) get loaded in X and Y
+ *
+ * mpya (rj), (ri) [, b]
+ *   name: multiply and add?
+ *   operation: A += P; P = (rj) * (ri)
+ *
+ * mpys (rj), (ri), b
+ *   name: multiply and subtract?
+ *   notes: not used by VR code.
+ */
+
+#include "../../PicoInt.h"
+
+#define rX     ssp->gr[SSP_X].l
+#define rY     ssp->gr[SSP_Y].l
+#define rA     ssp->gr[SSP_A]		// 4
+#define rST    ssp->gr[SSP_ST].l
+#define rSTACK ssp->gr[SSP_STACK].l
+#define rPC    ssp->gr[SSP_PC].l
+#define rP     ssp->gr[SSP_P]		// 8
+#define rPM0   ssp->gr[SSP_PM0].l
+#define rPM1   ssp->gr[SSP_PM1].l
+#define rPM2   ssp->gr[SSP_PM2].l
+#define rXST   ssp->gr[SSP_XST].l	// 12
+#define rPM4   ssp->gr[SSP_PM4].l	// 14
+#define rPMC   ssp->gr[SSP_PMC].l
+#define rAL    ssp->gr[SSP_A].l
+
+#define GET_PC() (PC - (unsigned short *)Pico.rom)
+#define SET_PC() PC = (unsigned short *)Pico.rom + rPC
+
+void ssp1601_reset(ssp1601_t *ssp)
+{
+	ssp->emu_status = 0;
+	ssp->gr[SSP_GR0].v = 0xffff;
+	rPC = 0x400;
+	rSTACK = 5; // ?
+}
+
+
+void ssp1601_run(ssp1601_t *ssp, int cycles)
+{
+	unsigned short *PC;
+	int op;
+
+	SET_PC();
+
+	while (cycles > 0)
+	{
+		op = *PC;
+		switch (op >> 9)
+		{
+			// ld d, s
+			case 0:
+			{
+				int s, d, opdata = 0;
+				if (op == 0) break; // nop
+				s =  op & 0x0f;
+				d = (op & 0xf0) >> 4;
+				if (s == SSP_A || s == SSP_P) opdata |= 1; // src is 32bit
+				if (d == SSP_A || d == SSP_P) opdata |= 2; // dst is 32bit
+				if (s == SSP_STACK) opdata |= 4; // src is stack
+				if (d == SSP_STACK) opdata |= 8; // dst is stack
+				switch (opdata)
+				{
+					case 0x0: ssp->gr[d].l = ssp->gr[s].l; break; // 16 <- 16
+					case 0x1: ssp->gr[d].l = ssp->gr[s].h; break; // 16 <- 32
+					case 0x2: ssp->gr[d].h = ssp->gr[s].l; break; // 32 <- 16
+						  // TODO: MAME claims that only hi word is transfered. Go figure.
+					case 0x3: ssp->gr[d].v = ssp->gr[s].v; break; // 32 <- 32
+					case 0x4: ; // TODO
+				}
+				if (d == SSP_PC)
+				{
+					SET_PC();
+					cycles--;
+				}
+				break;
+			}
+
+			default:
+			elprintf(0xffff, "ssp: unhandled op %04x @ %04x", op, GET_PC()<<1);
+			break;
+		}
+		cycles--;
+		PC++;
+	}
+
+	rPC = GET_PC();
+}
+

Pico/carthw/svp/ssp16.h

@@ -0,0 +1,46 @@
+
+// register names
+enum {
+	SSP_GR0, SSP_X,     SSP_Y,   SSP_A,
+	SSP_ST,  SSP_STACK, SSP_PC,  SSP_P,
+	SSP_PM0, SSP_PM1,   SSP_PM2, SSP_XST,
+	SSP_PM4, SSP_gr13,  SSP_PMC, SSP_AL
+};
+
+typedef union
+{
+	unsigned int v;
+	struct {
+		unsigned short l;
+		unsigned short h;
+	};
+} ssp_reg_t;
+
+typedef struct
+{
+	union {
+		unsigned short RAM[256*2];	// 2 internal RAM banks
+		struct {
+			unsigned short RAM0[256];
+			unsigned short RAM1[256];
+		};
+	};
+	ssp_reg_t gr[16];	// general registers
+	union {
+		unsigned char r[8];	// BANK pointers
+		struct {
+			unsigned char r0[4];
+			unsigned char r1[4];
+		};
+	};
+	unsigned short stack[6];
+	//
+	#define SSP_PMC_HAVE_ADDR 1	// address written to PMAC, waiting for mode
+	unsigned int emu_status;
+	unsigned int pad[10];
+} ssp1601_t;
+
+
+void ssp1601_reset(ssp1601_t *ssp);
+void ssp1601_run(ssp1601_t *ssp, int cycles);
+

Pico/carthw/svp/svp.c

@@ -1,7 +1,51 @@
 #include "../../PicoInt.h"
 
+svp_t *svp = NULL;
+
 void PicoSVPInit(void)
 {
-  elprintf(0xffff, "SVP");
+	void *tmp;
+
+	elprintf(0xffff, "SVP init");
+
+	tmp = realloc(Pico.rom, 0x200000 + sizeof(*svp));
+	if (tmp == NULL)
+	{
+		elprintf(EL_STATUS, "OOM for SVP data");
+		return;
+	}
+
+	Pico.rom = tmp;
+	svp = (void *) ((char *)tmp + 0x200000);
+	memset(svp, 0, sizeof(*svp));
+
+	// init ok, setup hooks..
+	PicoRead16Hook = PicoSVPRead16;
+	PicoWrite8Hook = PicoSVPWrite8;
+	PicoWrite16Hook = PicoSVPWrite16;
+	PicoDmaHook = PicoSVPDma;
+}
+
+
+void PicoSVPReset(void)
+{
+	elprintf(0xffff, "SVP reset");
+
+	ssp1601_reset(&svp->ssp1601);
+}
+
+
+int PicoSVPDma(unsigned int source, unsigned short **srcp, unsigned short **limitp)
+{
+	if ((source & 0xfe0000) == 0x300000)
+	{
+		elprintf(EL_VDPDMA|0xffff, "SVP DmaSlow from %06x", source);
+		source &= 0x1fffe;
+		*srcp = (unsigned short *)(svp->ram + source);
+		*limitp = (unsigned short *)(svp->ram + sizeof(svp->ram));
+		return 1;
+	}
+
+	return 0;
 }
 

platform/linux/Makefile

@@ -44,7 +44,7 @@ OBJS += Pico/cd/Pico.o Pico/cd/Memory.o Pico/cd/Sek.o Pico/cd/LC89510.o \
 # Pico - sound
 OBJS += Pico/sound/sound.o Pico/sound/sn76496.o Pico/sound/ym2612.o Pico/sound/mix.o
 # Pico - carthw
-OBJS += Pico/carthw/svp/svp.o Pico/carthw/svp/Memory.o
+OBJS += Pico/carthw/svp/svp.o Pico/carthw/svp/Memory.o Pico/carthw/svp/ssp16.o
 # zlib
 OBJS += zlib/gzio.o zlib/inffast.o zlib/inflate.o zlib/inftrees.o zlib/trees.o \
 	zlib/deflate.o zlib/crc32.o zlib/adler32.o zlib/zutil.o zlib/compress.o zlib/uncompr.o

platform/linux/port_config.h

@@ -14,7 +14,7 @@
 
 #define mix_32_to_16l_stereo_lvl mix_32_to_16l_stereo
 
-#define EL_LOGMASK (EL_ANOMALY|EL_STATUS|EL_SRAMIO|EL_EEPROM|EL_UIO) // EL_VDPDMA|EL_ASVDP|EL_SR) // |EL_BUSREQ|EL_Z80BNK)
+#define EL_LOGMASK (EL_ANOMALY|EL_STATUS|EL_SRAMIO|EL_EEPROM|EL_UIO|EL_VDPDMA) // EL_VDPDMA|EL_ASVDP|EL_SR) // |EL_BUSREQ|EL_Z80BNK)
 
 //#define dprintf(f,...) printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__)
 #define dprintf(x...)