kub
|
aa8a3b65f1
|
sh2 drc, adjust max ld/st offset in arm backend
|
2021-03-21 22:41:32 +01:00 |
|
kub
|
6f64058800
|
sh2 drc, x86 backend, optimize move #0 with xor
|
2021-03-16 21:42:50 +01:00 |
|
kub
|
2d2387b293
|
sh2 drc, fix reading from constant memory address
|
2021-03-16 21:42:50 +01:00 |
|
kub
|
8094d3362f
|
sh2 drc, powerpc fixes for OSX, 32 bit, cache handling
|
2021-01-30 09:03:01 +01:00 |
|
kub
|
2170797544
|
fixes for gcc warnings wrt 64 bit platforms
|
2020-12-29 11:13:45 +01:00 |
|
kub
|
e0d5c83fd3
|
32x, tiny optimization for memory access
|
2020-12-14 21:05:51 +01:00 |
|
kub
|
fde25b40fe
|
sh2 drc, fix PIC function calling for MIPS backend
|
2020-10-31 21:05:27 +01:00 |
|
kub
|
69c22514b0
|
sh2 drc, fixes for cache handling on arm and mips cpus
|
2020-10-27 18:05:49 +01:00 |
|
kub
|
6e8916bc9a
|
sh2 drc, MIPS cache maintenance optimisation
|
2020-10-11 19:54:51 +02:00 |
|
kub
|
4153006fb8
|
sh2 drc, fix for cpu cache handling
|
2020-10-10 14:21:10 +02:00 |
|
kub
|
713e3a1c5b
|
libretro, build fixes for android
|
2020-07-16 19:29:34 +02:00 |
|
kub
|
368c918050
|
sh2 drc, optimize standard division insns (default off, needs more scrutiny)
|
2020-07-14 00:21:33 +02:00 |
|
kub
|
1426b7569e
|
sh2 drc, fix for x86_64 backend
|
2020-07-08 20:48:16 +02:00 |
|
kub
|
6b67b6aa13
|
libretro, more fixes and cleanups for windows and osx
|
2020-07-08 20:46:46 +02:00 |
|
kub
|
18c95d9f57
|
sh2 drc, fix for SH2 T handling in Mips/RiscV
|
2020-06-25 16:49:17 +02:00 |
|
kub
|
c815b1bc59
|
sh2 drc, backend 32/64 bit compatibility fixes for Mips/RiscV
|
2020-06-23 23:34:07 +02:00 |
|
kub
|
8bb489470a
|
sh2 drc, add powerpc64le backend
|
2020-06-19 00:14:28 +02:00 |
|
kub
|
dae0d04dbf
|
sh2 drc, preparations for powerpc support
|
2020-06-16 18:43:45 +02:00 |
|
kub
|
d39eb595bb
|
sh2 drc: revised ARM A32 backend optimizer
|
2020-05-15 21:46:28 +02:00 |
|
kub
|
904fb98e6c
|
sh2: optimisations in drc
|
2020-05-06 23:06:31 +02:00 |
|
kub
|
f36709e651
|
sh2 drc: fix for crash in generated code on x86_64
|
2020-02-08 15:14:04 +01:00 |
|
kub
|
8ac9ab7fcb
|
audio: added SSG-EG to YM2612, plus some timing changes for SN76496+YM2612
|
2020-01-08 00:49:13 +01:00 |
|
kub
|
0e12269073
|
sh2 drc: optimize T bit handling for A64
|
2019-12-21 22:49:41 +01:00 |
|
kub
|
a5e51c16e6
|
sh2 drc: fix speed regression
|
2019-12-13 18:23:03 +01:00 |
|
kub
|
90b1c9db91
|
sh2 drc: cleanup, fix for drc crash, for mips code emitter
|
2019-12-11 20:39:27 +01:00 |
|
kub
|
9760505eaf
|
remove textrels with -fPIC/-fPIE (for android/ios)
|
2019-12-03 23:52:13 +01:00 |
|
kub
|
4f992bf541
|
sh2 drc, tentative MIPS32/64 Release 2 support
|
2019-12-02 22:31:14 +01:00 |
|
kub
|
57d863cb87
|
sh2 drc: bug fixing
|
2019-11-27 22:08:14 +01:00 |
|
kub
|
f1da0a362f
|
sh2 drc: fixed some RISC-V bugs
|
2019-11-20 01:01:33 +01:00 |
|
kub
|
f2d19ddf2a
|
sh2 drc, small improvements and bug fixes for code emitters
|
2019-11-19 21:59:44 +01:00 |
|
kub
|
f7a453816e
|
sh2 drc: RISC-V (RV64IM) code emitter, some work on MIPS64
|
2019-11-13 21:58:48 +01:00 |
|
kub
|
e7ee501075
|
sh2 drc: RISC-V (RV64IM) code emitter, some work on MIPS64
|
2019-11-13 21:56:11 +01:00 |
|
kub
|
aaea8e3ecd
|
sh2 drc: optimizations for MIPS code emitting
|
2019-11-09 10:30:57 +01:00 |
|
kub
|
9bd6706dca
|
sh2 drc: moved host register assignment to code emitters, minor bugfixing
|
2019-11-09 10:24:52 +01:00 |
|
kub
|
a6c0ab7d99
|
sh2 drc bugfix for aarch64/mips
|
2019-10-12 00:26:11 +02:00 |
|
kub
|
7869213d35
|
sh2 drc: speed optimization and bugfixing
|
2019-10-11 00:51:19 +02:00 |
|
kub
|
a0f5ba4067
|
sh2 drc: bug fixing and optimization in register cache and branch handling
|
2019-10-04 17:11:18 +02:00 |
|
kub
|
06bc3c0693
|
sh2 drc: drc exit, block linking and branch handling revised
|
2019-09-28 16:39:26 +02:00 |
|
kub
|
36614252d9
|
sh2 drc: improved RTS call stack cache
|
2019-09-19 22:14:28 +02:00 |
|
kub
|
f53e166cf4
|
various smallish optimizations, cleanups, and bug fixes
|
2019-09-17 23:05:35 +02:00 |
|
kub
|
fe344bd3d8
|
cleanup and microoptimizations in SH2 hw handling
|
2019-08-31 17:37:18 +02:00 |
|
kub
|
0f7a30ede3
|
configuration changes and README
|
2019-08-21 18:27:26 +02:00 |
|
kub
|
8284ab7107
|
various small fixes and optimsations
|
2019-08-16 15:14:41 +02:00 |
|
kub
|
b90e104fc9
|
sh2 drc: add aarch64 backend for A64
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
d80a5fd2ab
|
sh2 drc: add mipsel backend for MIPS32 Release 1 (for JZ47xx)
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
748b8187db
|
SH2 drc: bug fixing and small speed improvements
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
ee46642395
|
sh2 drc, x86 code emitter: use x86-64 registers R8-R15
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
8141d75694
|
sh2 drc, change utils abi to pass sh2 PC in arg0 (reduces compiled code size)
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
39615f6079
|
sh2 drc, keep T bit in host flags as long as possible
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
9e36dd0e08
|
add xSR/RTS call stack cache to sh2 drc
|
2019-07-30 16:34:40 +02:00 |
|