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55 lines
1.5 KiB
C
55 lines
1.5 KiB
C
int sh2_drc_init(SH2 *sh2);
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void sh2_drc_finish(SH2 *sh2);
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void sh2_drc_wcheck_ram(unsigned int a, int val, int cpuid);
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void sh2_drc_wcheck_da(unsigned int a, int val, int cpuid);
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#ifdef DRC_SH2
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void sh2_drc_mem_setup(SH2 *sh2);
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void sh2_drc_flush_all(void);
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void sh2_drc_frame(void);
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#else
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#define sh2_drc_mem_setup(x)
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#define sh2_drc_flush_all()
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#define sh2_drc_frame()
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#endif
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#define BLOCK_INSN_LIMIT 1024
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/* op_flags */
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#define OF_DELAY_OP (1 << 0)
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#define OF_BTARGET (1 << 1)
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#define OF_T_SET (1 << 2) // T is known to be set
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#define OF_T_CLEAR (1 << 3) // ... clear
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#define OF_B_IN_DS (1 << 4)
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void scan_block(unsigned int base_pc, int is_slave,
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unsigned char *op_flags, unsigned int *end_pc,
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unsigned int *end_literals);
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#if defined(DRC_SH2)
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// direct access to some host CPU registers used by the DRC
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// XXX MUST match definitions in cpu/sh2/compiler.c
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#if defined(__arm__)
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#define DRC_SR_REG r10
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#elif defined(__i386__)
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#define DRC_SR_REG edi
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#elif defined(__x86_64__)
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#define DRC_SR_REG ebx
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#else
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#warning "direct DRC register access not available for this host"
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#endif
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#ifdef DCR_SR_REG
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#define DRC_DECLARE_SR register int sh2_sr asm(#DCR_SR_REG)
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#define DRC_SAVE_SR(sh2) \
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if ((sh2->state & (SH2_STATE_RUN|SH2_STATE_BUSY)) == SH2_STATE_RUN) \
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sh2->sr = sh2_sr;
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#define DRC_RESTORE_SR(sh2) \
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if ((sh2->state & (SH2_STATE_RUN|SH2_STATE_BUSY)) == SH2_STATE_RUN) \
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sh2_sr = sh2->sr;
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#else
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#define DRC_DECLARE_SR
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#define DRC_SAVE_SR(sh2)
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#define DRC_RESTORE_SR(sh2)
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#endif
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#endif
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