397 commits

Author	SHA1	Message	Date
kub	3bfee02717	z80, fix Drz80 for changed SMS banking	2021-10-04 18:18:38 +02:00
kub	b784d4a5f7	sms, improve ROM bank mapping, add some SRAM support	2021-10-03 23:59:09 +02:00
kub	bd07808352	32x, improve poll detection	2021-06-28 22:58:04 +02:00
kub	8d8357dded	sh2 drc, fix arm32 ld/st offset (minimum -255)	2021-06-28 21:31:32 +02:00
kub	ca8b001b7f	z80, fix cz80 CPU reset (most regs not touched by reset)	2021-06-23 19:13:54 +02:00
kub	5275d43aaa	sh2 drc, some small cleanups	2021-06-23 19:08:25 +02:00
kub	b5aba27c9b	sh2 drc, fix constant memory address access calculation	2021-06-16 22:38:50 +02:00
kub	6f9993a461	sh2 drc, fix bugs in code block management	2021-06-07 19:38:28 +02:00
kub	05d7b88542	update cyclone (BTST #imm,Dn and ADDQ.W #imm,An timing)	2021-06-03 22:06:03 +02:00
kub	5e04c2f37f	68k, synchronize timing in fame and musashi (for debugging)	2021-05-25 15:02:42 +02:00
kub	f99f0794cf	sh2 interpreter, minor improvement for irq handling	2021-05-19 19:18:36 +02:00
kub	fa0d0d224e	sh2 drc+interpreter, minor improvement for cycle counting	2021-05-19 19:15:19 +02:00
kub	e867ec06e1	68k, fix timing for BTST #imm,Dn and ADDQ.W #imm,An in fame	2021-05-19 19:04:37 +02:00
kub	ca1b77e601	32x, drc, fix saving SH2 SR in dma	2021-05-11 22:05:57 +02:00
kub	e08e46ba44	libretro, build change for PS3 (disable drc)	2021-05-06 22:06:04 +02:00
kub	7fe2d3d33f	sh2 drc, debug stuff	2021-04-21 22:02:36 +02:00
kub	f7615fc283	sh2 drc, fix powerpc cache handling	2021-04-21 22:01:22 +02:00
kub	448b634ccc	sh2 drc, fix powerpc eabi compatibility	2021-04-17 20:46:27 +02:00
kub	c9a715c777	sh2 drc, debugging fixes	2021-04-16 00:27:50 +02:00
kub	09c274d4b2	68k, fix musashi support (for debugging only)	2021-04-16 00:26:23 +02:00
kub	75aba9cc65	sh2 drc, tiny optimization for x86	2021-04-16 00:18:58 +02:00
kub	44245ef0ea	libretro, build fix for ngc/wii/wiiu	2021-04-12 20:04:51 +02:00
kub	5f97951865	sh2 drc, fix optimized standard division ... still turned off, needs testing and performance checks	2021-04-07 22:24:03 +02:00
kub	2dbaa49a1a	sh2 drc, x86 fix, revert 6f64058 (carry usage in NEGC/DIV1)	2021-04-02 18:45:03 +02:00
kub	d5bc6ef7b5	sh2 drc, debug stuff	2021-03-21 22:55:21 +01:00
kub	28f83122ec	sh2 drc, don't use x29 (frame pointer) in arm64 backend	2021-03-21 22:47:56 +01:00
kub	aa8a3b65f1	sh2 drc, adjust max ld/st offset in arm backend	2021-03-21 22:41:32 +01:00
kub	a1ca8377c9	sh2 drc, fix oversize blocks ending with JSR/BSR	2021-03-16 21:42:50 +01:00
kub	6f64058800	sh2 drc, x86 backend, optimize move #0 with xor	2021-03-16 21:42:50 +01:00
kub	2d2387b293	sh2 drc, fix reading from constant memory address	2021-03-16 21:42:50 +01:00
kub	57c5a5e505	add big endian platform support	2021-02-22 22:27:51 +01:00
kub	4cc0fcaf15	fixes and improvements for type issues, part 3	2021-02-06 01:14:07 +01:00
kub	8094d3362f	sh2 drc, powerpc fixes for OSX, 32 bit, cache handling	2021-01-30 09:03:01 +01:00
kub	31d08e90c8	cz80, fix flags for OUT[ID]/OT[ID]R	2021-01-22 22:33:37 +01:00
kub	1dee74458b	sh2 drc, fix for MIPS EABI	2021-01-13 23:14:00 +01:00
kub	f821bb7011	core, structural cleanup, fixes and improvements for type issues #2	2021-01-01 12:44:02 +01:00
kub	2170797544	fixes for gcc warnings wrt 64 bit platforms	2020-12-29 11:13:45 +01:00
kub	85894ad406	cz80, improve cycle accounting	2020-12-14 21:06:24 +01:00
kub	e0d5c83fd3	32x, tiny optimization for memory access	2020-12-14 21:05:51 +01:00
kub	a20300bf1e	fixes for memory leaks and out of bounds memory access found by ASAN or gcc -flto	2020-12-12 14:57:56 +01:00
kub	7e5b769d8f	libretro, improve ps2 support, switchable renderers, 32X support w/ DRC	2020-12-12 14:51:44 +01:00
kub	42077979ca	drc, fix libretro removing of gcc-only syntax	2020-12-05 15:17:48 +01:00
kub	61d76999d7	Merge from libretro/master:46902e0 for repo synchronization	2020-12-05 22:39:06 +01:00
kub	efb6bc7d73	sh2 drc, fix for mapping in register cache	2020-11-23 00:24:34 +01:00
kub	7082729e06	sh2 drc, fix sh2 reg enum usage	2020-11-01 22:55:48 +01:00
kub	fde25b40fe	sh2 drc, fix PIC function calling for MIPS backend	2020-10-31 21:05:27 +01:00
kub	69c22514b0	sh2 drc, fixes for cache handling on arm and mips cpus	2020-10-27 18:05:49 +01:00
kub	6e8916bc9a	sh2 drc, MIPS cache maintenance optimisation	2020-10-11 19:54:51 +02:00
kub	4153006fb8	sh2 drc, fix for cpu cache handling	2020-10-10 14:21:10 +02:00
kub	b286d66f7b	sh2 drc, improve T bit propagation	2020-10-10 09:44:15 +02:00