kub
|
68e50296e6
|
sh2 drc, small fixes (cycle counting, invalidation)
|
2024-06-02 07:55:40 +00:00 |
|
OsirizX
|
1ef527e93b
|
Apply some cleanups to the abicall macros
|
2023-01-12 21:01:14 +01:00 |
|
kub
|
0512a22869
|
sh2 drc, wrap generated function ptrs if called from host
|
2023-01-09 20:45:10 +00:00 |
|
kub
|
aa9c5aa559
|
sh2 drc, minor fix for arg passing in calls from generated to C code
|
2022-11-21 21:19:34 +00:00 |
|
kub
|
05138bbd89
|
sh2 drc, fixes for mips, ppc, i386 backends (mostly 64 bit related)
|
2022-01-19 17:09:55 +00:00 |
|
kub
|
cd18409722
|
drc, tiny x86 optimisation
|
2022-01-05 23:41:24 +01:00 |
|
kub
|
2dbaa49a1a
|
sh2 drc, x86 fix, revert 6f64058 (carry usage in NEGC/DIV1)
|
2021-04-02 18:45:03 +02:00 |
|
kub
|
6f64058800
|
sh2 drc, x86 backend, optimize move #0 with xor
|
2021-03-16 21:42:50 +01:00 |
|
kub
|
2d2387b293
|
sh2 drc, fix reading from constant memory address
|
2021-03-16 21:42:50 +01:00 |
|
kub
|
fde25b40fe
|
sh2 drc, fix PIC function calling for MIPS backend
|
2020-10-31 21:05:27 +01:00 |
|
kub
|
4153006fb8
|
sh2 drc, fix for cpu cache handling
|
2020-10-10 14:21:10 +02:00 |
|
kub
|
368c918050
|
sh2 drc, optimize standard division insns (default off, needs more scrutiny)
|
2020-07-14 00:21:33 +02:00 |
|
kub
|
1426b7569e
|
sh2 drc, fix for x86_64 backend
|
2020-07-08 20:48:16 +02:00 |
|
kub
|
6b67b6aa13
|
libretro, more fixes and cleanups for windows and osx
|
2020-07-08 20:46:46 +02:00 |
|
kub
|
8bb489470a
|
sh2 drc, add powerpc64le backend
|
2020-06-19 00:14:28 +02:00 |
|
kub
|
f36709e651
|
sh2 drc: fix for crash in generated code on x86_64
|
2020-02-08 15:14:04 +01:00 |
|
kub
|
a5e51c16e6
|
sh2 drc: fix speed regression
|
2019-12-13 18:23:03 +01:00 |
|
kub
|
f2d19ddf2a
|
sh2 drc, small improvements and bug fixes for code emitters
|
2019-11-19 21:59:44 +01:00 |
|
kub
|
e7ee501075
|
sh2 drc: RISC-V (RV64IM) code emitter, some work on MIPS64
|
2019-11-13 21:56:11 +01:00 |
|
kub
|
aaea8e3ecd
|
sh2 drc: optimizations for MIPS code emitting
|
2019-11-09 10:30:57 +01:00 |
|
kub
|
9bd6706dca
|
sh2 drc: moved host register assignment to code emitters, minor bugfixing
|
2019-11-09 10:24:52 +01:00 |
|
kub
|
a6c0ab7d99
|
sh2 drc bugfix for aarch64/mips
|
2019-10-12 00:26:11 +02:00 |
|
kub
|
7869213d35
|
sh2 drc: speed optimization and bugfixing
|
2019-10-11 00:51:19 +02:00 |
|
kub
|
06bc3c0693
|
sh2 drc: drc exit, block linking and branch handling revised
|
2019-09-28 16:39:26 +02:00 |
|
kub
|
36614252d9
|
sh2 drc: improved RTS call stack cache
|
2019-09-19 22:14:28 +02:00 |
|
kub
|
f53e166cf4
|
various smallish optimizations, cleanups, and bug fixes
|
2019-09-17 23:05:35 +02:00 |
|
kub
|
fe344bd3d8
|
cleanup and microoptimizations in SH2 hw handling
|
2019-08-31 17:37:18 +02:00 |
|
kub
|
0f7a30ede3
|
configuration changes and README
|
2019-08-21 18:27:26 +02:00 |
|
kub
|
8284ab7107
|
various small fixes and optimsations
|
2019-08-16 15:14:41 +02:00 |
|
kub
|
d80a5fd2ab
|
sh2 drc: add mipsel backend for MIPS32 Release 1 (for JZ47xx)
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
748b8187db
|
SH2 drc: bug fixing and small speed improvements
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
ee46642395
|
sh2 drc, x86 code emitter: use x86-64 registers R8-R15
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
8141d75694
|
sh2 drc, change utils abi to pass sh2 PC in arg0 (reduces compiled code size)
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
39615f6079
|
sh2 drc, keep T bit in host flags as long as possible
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
9e36dd0e08
|
add xSR/RTS call stack cache to sh2 drc
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
397ccdc6cf
|
sh2 drc, add detection for in-memory polling
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
213b7f42c1
|
sh2 drc, add loop detector, handle delay/idle loops
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
e01deede1b
|
sh2 drc, code emitter cleanup, add ARM reorder stage to reduce interlock
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
aa4c4cb951
|
sh2 drc, make B/W read functions signed (reduces generated code size)
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
83bafe8e0b
|
add literal pool to sh2 drc (for armv[456] without MOVT/W)
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
d40a5af495
|
various small improvements and fixes
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
d760c90f3a
|
added branch cache to sh2 drc to improve cross-tcache jump speed
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
6822ba9d64
|
sh2 memory interface optimzations
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
4f4e9bf3bd
|
overhaul of the register cache (improves generated code by some 10+%)
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
1db36a7a07
|
sh2 drc: sh2 addr modes generalization, more const propagation, code gen optimizations
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
b804d9543b
|
DRC: reworked scan_block (fix register usage masks, better block and literals detection)
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
2fa02d5a63
|
improved sh2 clock handling, bug fixing + small improvement to drc emitters
|
2019-07-30 16:34:40 +02:00 |
|
notaz
|
fda2f31020
|
drc: support ms ABI
|
2018-01-07 01:20:00 +02:00 |
|
notaz
|
898d51a7fd
|
drc: revive x86 dynarec, support x86-64
|
2017-12-12 01:45:59 +02:00 |
|
notaz
|
f81107f590
|
32x: memhandler improvements
- use consistent read tables (with write)
- use sh2 ptr instead of id
- place data_array/peri_regs in sh2 struct
|
2013-08-08 03:02:54 +03:00 |
|