kub
|
96baa875a0
|
core, improve save/load
|
2022-01-19 22:00:23 +00:00 |
|
kub
|
b1a6586688
|
32x, improve loading save state (memory leak, 68k hang)
|
2022-01-06 21:35:49 +01:00 |
|
kub
|
439cf7f850
|
32x, improve cartridge mapping, BIOS replication
|
2021-11-28 22:02:11 +01:00 |
|
kub
|
52e4a905c8
|
32x, add support for h32 mode rendering
|
2021-11-22 19:18:49 +01:00 |
|
kub
|
91ea9406e2
|
improvements for type issues
|
2021-04-22 23:31:36 +02:00 |
|
kub
|
6bb230c7ec
|
32x, scheduling optimization
|
2021-04-07 22:31:00 +02:00 |
|
kub
|
57c5a5e505
|
add big endian platform support
|
2021-02-22 22:27:51 +01:00 |
|
kub
|
f55fb31463
|
vdp renderer, improvements for 8bit fast
improved 240 lines support, add setting buffer width, structural improvements
|
2021-01-20 20:55:12 +01:00 |
|
kub
|
f821bb7011
|
core, structural cleanup, fixes and improvements for type issues #2
|
2021-01-01 12:44:02 +01:00 |
|
kub
|
2eb213314a
|
sh2, optimizations to innermost run loop
|
2020-04-22 21:49:02 +02:00 |
|
kub
|
74cc7aebf6
|
sh2 timer optimization
|
2020-04-13 22:20:13 +02:00 |
|
kub
|
43e1401008
|
emulator timing fixes, VDP DMA fixes, improved DAC audio
|
2020-01-14 23:00:44 +01:00 |
|
kub
|
b9bc876c9c
|
bug fixes in drc, audio, display
|
2020-01-14 22:49:03 +01:00 |
|
kub
|
e7ee501075
|
sh2 drc: RISC-V (RV64IM) code emitter, some work on MIPS64
|
2019-11-13 21:56:11 +01:00 |
|
kub
|
aaea8e3ecd
|
sh2 drc: optimizations for MIPS code emitting
|
2019-11-09 10:30:57 +01:00 |
|
kub
|
86c16afd45
|
32x, speed improvement
|
2019-10-11 00:56:26 +02:00 |
|
kub
|
f53e166cf4
|
various smallish optimizations, cleanups, and bug fixes
|
2019-09-17 23:05:35 +02:00 |
|
kub
|
fe344bd3d8
|
cleanup and microoptimizations in SH2 hw handling
|
2019-08-31 17:37:18 +02:00 |
|
kub
|
e43998086c
|
polling detection: communication poll fifo to avoid comm data loss
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
397ccdc6cf
|
sh2 drc, add detection for in-memory polling
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
d40a5af495
|
various small improvements and fixes
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
32feba7458
|
minor changes
|
2019-07-30 16:34:40 +02:00 |
|
kub
|
2fa02d5a63
|
improved sh2 clock handling, bug fixing + small improvement to drc emitters
|
2019-07-30 16:34:40 +02:00 |
|
notaz
|
6c2041fea0
|
32x: add other timing hacks
For sdram sync, like NJTE.
Still bad, but don't have a better solution for now (or ever?).
|
2017-11-28 02:25:06 +02:00 |
|
notaz
|
31fbc691a1
|
32x: remove some comm hacks
they can (and do) easily break things
|
2017-11-28 02:25:06 +02:00 |
|
notaz
|
93f9619ed8
|
rearrange globals
scripted find/replace
gives slightly better code on ARM, less unnecessary asm,
~400 bytes saved
|
2017-10-20 12:21:09 +03:00 |
|
notaz
|
24aab4da73
|
let it build on msvc
supposedly for the original XBox?
|
2017-10-14 21:28:24 +03:00 |
|
notaz
|
e9a11abb3c
|
drop some unnecessary inlines
apparently somebody compiles with msvc?
|
2017-10-14 00:53:09 +03:00 |
|
notaz
|
e0bcb7a90d
|
some support for vdp debug reg
|
2017-10-03 00:41:13 +03:00 |
|
notaz
|
61c4e5117a
|
32x: skip unnecessary bios work in cd mode
|
2017-08-19 00:38:03 +03:00 |
|
notaz
|
a6523294e2
|
cd: fix cycle overflow issue
|
2013-10-04 23:24:36 +03:00 |
|
notaz
|
8e4e84c215
|
cd: fix yet more desyncs
state load, reset..
|
2013-09-23 02:11:26 +03:00 |
|
notaz
|
fa8fb75445
|
handle 32x+cd
|
2013-09-16 02:03:29 +03:00 |
|
notaz
|
0185b67736
|
allow to disable SH2 dynarec on runtime
|
2013-08-31 20:48:39 +03:00 |
|
notaz
|
ae214f1c37
|
new timing for main and cd
|
2013-08-28 01:07:26 +03:00 |
|
notaz
|
419973a6d6
|
32x: some hacks..
|
2013-08-18 22:34:53 +03:00 |
|
notaz
|
9e1fa0a6cf
|
32x: improve interrupt handling
..hopefully..
|
2013-08-17 23:51:58 +03:00 |
|
notaz
|
5ac99d9adf
|
32x: add preliminary hint emulation
|
2013-08-15 20:08:27 +03:00 |
|
notaz
|
f8675e282e
|
32x: simplify logging a bit
|
2013-08-14 03:37:45 +03:00 |
|
notaz
|
61801d5bc8
|
32x: implement more sh2 peripherals
|
2013-08-13 03:46:29 +03:00 |
|
notaz
|
4a1fb18323
|
32x: handle FEN quirk
Metal Head relies on it?
|
2013-08-11 01:32:19 +03:00 |
|
notaz
|
cd0ace2832
|
fix incomplete init
|
2013-08-10 19:46:27 +03:00 |
|
notaz
|
f81107f590
|
32x: memhandler improvements
- use consistent read tables (with write)
- use sh2 ptr instead of id
- place data_array/peri_regs in sh2 struct
|
2013-08-08 03:02:54 +03:00 |
|
notaz
|
c1931173ab
|
32x: fix some more timing problems
|
2013-08-07 01:46:45 +03:00 |
|
notaz
|
4d5dfee861
|
32x: some accuracy improvements
|
2013-08-06 02:39:59 +03:00 |
|
notaz
|
045a4c528a
|
32x: move sh2 peripheral emu code to it's own file
also adds 16byte dma
|
2013-08-06 02:39:29 +03:00 |
|
notaz
|
df63f1a6ff
|
32x: implement dreq1, improve dmac
|
2013-08-05 00:04:30 +03:00 |
|
notaz
|
a7f82a776a
|
32x: improve pwm accuracy
|
2013-08-03 18:43:15 +03:00 |
|
notaz
|
19886062f1
|
rework sh2 sync, again..
also some new debug and poll code
VF seems to be ok at least..
|
2013-07-27 22:23:52 +03:00 |
|
notaz
|
51d86e55f6
|
drc: tune invalidation
|
2013-07-23 01:45:21 +03:00 |
|