92 commits

Author	SHA1	Message	Date
kub	adf39a13f9	sh2 drc, register cache optimisations	2019-07-30 16:34:40 +02:00
kub	49daa9e093	sh2 drc, block management bugfixes and cleanup	2019-07-30 16:34:40 +02:00
kub	397ccdc6cf	sh2 drc, add detection for in-memory polling	2019-07-30 16:34:40 +02:00
kub	213b7f42c1	sh2 drc, add loop detector, handle delay/idle loops	2019-07-30 16:34:40 +02:00
kub	e01deede1b	sh2 drc, code emitter cleanup, add ARM reorder stage to reduce interlock	2019-07-30 16:34:40 +02:00
kub	aa4c4cb951	sh2 drc, make B/W read functions signed (reduces generated code size)	2019-07-30 16:34:40 +02:00
kub	ed7e915078	sh2 drc, improved constant handling and register allocator	2019-07-30 16:34:40 +02:00
kub	83bafe8e0b	add literal pool to sh2 drc (for armv[456] without MOVT/W)	2019-07-30 16:34:40 +02:00
kub	47ee54b873	sh2 drc, reuse blocks if already previously compiled (speedup for Virtua *)	2019-07-30 16:34:40 +02:00
kub	d40a5af495	various small improvements and fixes	2019-07-30 16:34:40 +02:00
kub	f133766faa	overhaul of translation cache and sh2 literals handling	2019-07-30 16:34:40 +02:00
kub	d760c90f3a	added branch cache to sh2 drc to improve cross-tcache jump speed	2019-07-30 16:34:40 +02:00
kub	6822ba9d64	sh2 memory interface optimzations	2019-07-30 16:34:40 +02:00
kub	4f4e9bf3bd	overhaul of the register cache (improves generated code by some 10+%)	2019-07-30 16:34:40 +02:00
kub	e267031a50	debug stuff, bug fixing	2019-07-30 16:34:40 +02:00
kub	ff0eaa11d9	move saving SH2 SR into memory access and do so only if needed	2019-07-30 16:34:40 +02:00
kub	9031406131	add 32bit memory access functions for SH2	2019-07-30 16:34:40 +02:00
kub	1db36a7a07	sh2 drc: sh2 addr modes generalization, more const propagation, code gen optimizations	2019-07-30 16:34:40 +02:00
kub	b804d9543b	DRC: reworked scan_block (fix register usage masks, better block and literals detection)	2019-07-30 16:34:40 +02:00
kub	064cc6d103	kludges for wwf raw, nfl	2019-07-30 16:34:40 +02:00
kub	f5939109c4	sh2 drc host disassembler integration for gp2x	2019-07-30 16:34:40 +02:00
notaz	8b9dbcde38	32x: implement standard/ssf2 mapper	2018-01-21 18:57:13 +02:00
notaz	fda2f31020	drc: support ms ABI	2018-01-07 01:20:00 +02:00
notaz	898d51a7fd	drc: revive x86 dynarec, support x86-64	2017-12-12 01:45:59 +02:00
notaz	98a3d79ba2	drc: arm: use movw/movt ... it's about time...	2017-12-03 17:44:33 +02:00
notaz	00468b0a9b	drc: do lit check before size_nolit is cleared	2017-12-03 17:44:33 +02:00
notaz	d602fd4f73	drc: ignore cache-through on smc check	2017-12-03 17:44:33 +02:00
notaz	f0ed9e38ad	drc: rm overlapped block entry points ... otherwise we get duplicates in hash tables	2017-12-03 17:44:33 +02:00
notaz	759c9d3846	pandora: fix build ... Fixes: df9251536d "libretro: satisfy vita's dynarec needs in a cleaner way"	2017-10-20 12:20:59 +03:00
notaz	e9a11abb3c	drop some unnecessary inlines ... apparently somebody compiles with msvc?	2017-10-14 00:53:09 +03:00
notaz	6a5b1b362e	sh2: handle some branch exceptions	2017-08-18 03:44:46 +03:00
notaz	0185b67736	allow to disable SH2 dynarec on runtime	2013-08-31 20:48:39 +03:00
notaz	895d15121b	deal with some strict aliasing issues	2013-08-20 03:20:37 +03:00
notaz	eb35ce1506	32x: some mapping corrections	2013-08-19 03:55:55 +03:00
notaz	0219d379de	fixes for idle and other stuff	2013-08-16 01:14:38 +03:00
notaz	001f73a0d6	32x: drc: emulate illegal insn ... The X-Men proto debugger makes it worth it	2013-08-14 03:37:45 +03:00
notaz	f8675e282e	32x: simplify logging a bit	2013-08-14 03:37:45 +03:00
notaz	f81107f590	32x: memhandler improvements ... - use consistent read tables (with write) - use sh2 ptr instead of id - place data_array/peri_regs in sh2 struct	2013-08-08 03:02:54 +03:00
notaz	2dbc96b1c7	preserve r9 for apple	2013-07-29 03:28:45 +03:00
notaz	ee5f7e9936	drc: dumb detection of writes to current block	2013-07-28 23:29:05 +03:00
notaz	405dfdd77f	drc: some debug improvements	2013-07-28 23:29:05 +03:00
notaz	51d86e55f6	drc: tune invalidation	2013-07-23 01:45:21 +03:00
notaz	f2dde8713e	comment adjustments	2013-07-23 01:45:21 +03:00
notaz	fa841b44c4	drc: various fixes / refactoring	2013-07-23 01:45:21 +03:00
notaz	6976a54726	drc: fix regcache and invalidation issues	2013-07-23 01:45:21 +03:00
notaz	6d7979571d	drc: debug improvements	2013-07-23 01:45:21 +03:00
notaz	bf092a3631	drc: split disassembly to separate pass ... allows easier analysis	2013-07-20 20:33:44 +03:00
notaz	d056bef851	drc: rm write irq check ... does more bad than good	2013-07-20 20:29:59 +03:00
notaz	00a725a87c	drc: rework block link tracking	2013-07-18 02:37:27 +03:00
notaz	228ee974aa	drc: rework block tracking and lookup ... - all 3 caches have their own hash tables (for now?) - block entry points have separate structures from blocks, so invalidation can now properly be done	2013-07-18 02:37:08 +03:00